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[75.142.250.213]) by smtp.gmail.com with ESMTPSA id 94sm915513otj.33.2021.06.24.14.17.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Jun 2021 14:17:49 -0700 (PDT) From: trix@redhat.com To: mdf@kernel.org, hao.wu@intel.com, michal.simek@xilinx.com Cc: linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tom Rix Subject: [PATCH v4 2/5] fpga: add FPGA_MGR_REIMAGE flag Date: Thu, 24 Jun 2021 14:17:24 -0700 Message-Id: <20210624211727.501019-4-trix@redhat.com> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210624211727.501019-1-trix@redhat.com> References: <20210624211727.501019-1-trix@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=trix@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210624_141754_631356_301E72A0 X-CRM114-Status: GOOD ( 10.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Tom Rix If this flag is set the reimage ops will be used otherwise the reconfig ops will be used to write the image Signed-off-by: Tom Rix --- include/linux/fpga/fpga-mgr.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h index 53f9402d6aa17..0791e22b07f88 100644 --- a/include/linux/fpga/fpga-mgr.h +++ b/include/linux/fpga/fpga-mgr.h @@ -67,12 +67,15 @@ enum fpga_mgr_states { * %FPGA_MGR_BITSTREAM_LSB_FIRST: SPI bitstream bit order is LSB first * * %FPGA_MGR_COMPRESSED_BITSTREAM: FPGA bitstream is compressed + * + * %FPGA_MGR_REIMAGE: Reimage the whole card, fpga bs and other device fw */ #define FPGA_MGR_PARTIAL_RECONFIG BIT(0) #define FPGA_MGR_EXTERNAL_CONFIG BIT(1) #define FPGA_MGR_ENCRYPTED_BITSTREAM BIT(2) #define FPGA_MGR_BITSTREAM_LSB_FIRST BIT(3) #define FPGA_MGR_COMPRESSED_BITSTREAM BIT(4) +#define FPGA_MGR_REIMAGE BIT(5) /** * struct fpga_image_info - information specific to an FPGA image