@@ -232,9 +232,9 @@
>;
};
- pinctrl_pcie: pcie-grp {
+ pinctrl_pcie_reset: pcie-reset-grp {
fsl,pins = <
- MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b0b1
+ MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x120b0
>;
};
};
@@ -244,8 +244,7 @@
};
&pcie {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pcie>;
+ pinctrl-0 = <&pinctrl_pcie &pinctrl_pcie_reset>;
reset-gpio = <&gpio6 14 GPIO_ACTIVE_LOW>;
status = "okay";
};
@@ -450,6 +450,12 @@
>;
};
+ pinctrl_pcie: pcie-grp {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b0b1 /* Wake */
+ >;
+ };
+
pinctrl_uart1: uart1-grp {
fsl,pins = <
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
@@ -568,6 +574,11 @@
};
};
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+};
+
®_arm {
vin-supply = <&sw3_reg>;
};