| Message ID | 20210721204703.1424034-7-l.stach@pengutronix.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | i.MX8MM GPC improvements and BLK_CTRL driver | expand |
> Subject: [PATCH v2 06/18] soc: imx: gpcv2: keep i.MX8M* bus clocks enabled > > Annotate the domains with bus clocks to keep those clocks enabled as long as > the domain is active. > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> > --- > drivers/soc/imx/gpcv2.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c index > c3b1d2580963..c48f37f203ab 100644 > --- a/drivers/soc/imx/gpcv2.c > +++ b/drivers/soc/imx/gpcv2.c > @@ -625,6 +625,7 @@ static const struct imx_pgc_domain > imx8mm_pgc_domains[] = { > .hskreq = IMX8MM_HSIO_HSK_PWRDNREQN, > .hskack = IMX8MM_HSIO_HSK_PWRDNACKN, > }, > + .keep_clocks = true, > }, > > [IMX8MM_POWER_DOMAIN_PCIE] = { > @@ -671,6 +672,7 @@ static const struct imx_pgc_domain > imx8mm_pgc_domains[] = { > .hskack = IMX8MM_GPUMIX_HSK_PWRDNACKN, > }, > .pgc = BIT(IMX8MM_PGC_GPUMIX), > + .keep_clocks = true, > }, > > [IMX8MM_POWER_DOMAIN_GPU] = { > @@ -697,6 +699,7 @@ static const struct imx_pgc_domain > imx8mm_pgc_domains[] = { > .hskack = IMX8MM_VPUMIX_HSK_PWRDNACKN, > }, > .pgc = BIT(IMX8MM_PGC_VPUMIX), > + .keep_clocks = true, > }, > > [IMX8MM_POWER_DOMAIN_VPUG1] = { > @@ -743,6 +746,7 @@ static const struct imx_pgc_domain > imx8mm_pgc_domains[] = { > .hskack = IMX8MM_DISPMIX_HSK_PWRDNACKN, > }, > .pgc = BIT(IMX8MM_PGC_DISPMIX), > + .keep_clocks = true, > }, > > [IMX8MM_POWER_DOMAIN_MIPI] = { > @@ -810,6 +814,7 @@ static const struct imx_pgc_domain > imx8mn_pgc_domains[] = { > .hskreq = IMX8MN_HSIO_HSK_PWRDNREQN, > .hskack = IMX8MN_HSIO_HSK_PWRDNACKN, > }, > + .keep_clocks = true, > }, > > [IMX8MN_POWER_DOMAIN_OTG1] = { > -- > 2.30.2
diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c index c3b1d2580963..c48f37f203ab 100644 --- a/drivers/soc/imx/gpcv2.c +++ b/drivers/soc/imx/gpcv2.c @@ -625,6 +625,7 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = { .hskreq = IMX8MM_HSIO_HSK_PWRDNREQN, .hskack = IMX8MM_HSIO_HSK_PWRDNACKN, }, + .keep_clocks = true, }, [IMX8MM_POWER_DOMAIN_PCIE] = { @@ -671,6 +672,7 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = { .hskack = IMX8MM_GPUMIX_HSK_PWRDNACKN, }, .pgc = BIT(IMX8MM_PGC_GPUMIX), + .keep_clocks = true, }, [IMX8MM_POWER_DOMAIN_GPU] = { @@ -697,6 +699,7 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = { .hskack = IMX8MM_VPUMIX_HSK_PWRDNACKN, }, .pgc = BIT(IMX8MM_PGC_VPUMIX), + .keep_clocks = true, }, [IMX8MM_POWER_DOMAIN_VPUG1] = { @@ -743,6 +746,7 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = { .hskack = IMX8MM_DISPMIX_HSK_PWRDNACKN, }, .pgc = BIT(IMX8MM_PGC_DISPMIX), + .keep_clocks = true, }, [IMX8MM_POWER_DOMAIN_MIPI] = { @@ -810,6 +814,7 @@ static const struct imx_pgc_domain imx8mn_pgc_domains[] = { .hskreq = IMX8MN_HSIO_HSK_PWRDNREQN, .hskack = IMX8MN_HSIO_HSK_PWRDNACKN, }, + .keep_clocks = true, }, [IMX8MN_POWER_DOMAIN_OTG1] = {
Annotate the domains with bus clocks to keep those clocks enabled as long as the domain is active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- drivers/soc/imx/gpcv2.c | 5 +++++ 1 file changed, 5 insertions(+)