From patchwork Mon Aug 2 14:10:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoph Niedermaier X-Patchwork-Id: 12414201 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3E1AC4338F for ; Mon, 2 Aug 2021 15:00:29 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B615061029 for ; Mon, 2 Aug 2021 15:00:29 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org B615061029 Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=dh-electronics.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=9hZlRNrZYJf5NKGf4tBfvttMxIBBbH5ugWlzvIY3Klw=; b=EqrXiVpI9JkewZ G5zU/pnq7s2kfXjrSsx7JCEQMPuYlo7SfxouBmGvcx6h7izTYVBON6/lXR7uaSLGjxdVN4eEi1Ke5 kG4eZ9jfgCt9HEjf82HzX+u/xKwmcDJiDeg7Em3oN16A5QWs5X5qSUsMfg67CYEyOv2q2SQEK9egE qsbqJ5CYydoxQFrp5iFHPaLUnQJNE8OYMAfOI0Huwj0TrmQcAB8C4yriblP3dGt2WYMSPIRFZBpaU Pj2KsaaLN3yObELAClzsQxY8ZDS+u+pDOXg6dSFKuEtRkMHlpTKMhU4lDWzndnTDrgoQe5azYiW9b vKQ2OLGFt+u8TYxOdaOQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mAZOM-00GnX3-AG; Mon, 02 Aug 2021 14:58:10 +0000 Received: from mx4.securetransport.de ([178.254.6.145]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mAZOF-00GnSo-F9 for linux-arm-kernel@lists.infradead.org; Mon, 02 Aug 2021 14:58:05 +0000 Received: from mail.dh-electronics.com (business-24-134-97-169.pool2.vodafone-ip.de [24.134.97.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx4.securetransport.de (Postfix) with ESMTPSA id 3A8FF7201EC; Mon, 2 Aug 2021 16:57:49 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dh-electronics.com; s=dhelectronicscom; t=1627916269; bh=iyTXyLp4QTzMsOml59cqDF47SFxjSW2smcA/+1gKznY=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=o0Mcn/GSWzsa3EW8JC2N4L81fBC0G/89pu4txeCyMWU8KN7LEdMI6/0S3B2he6qzN lVBpEBF19MOfdSYEwfIn/7k9poBDNeX67IKFSv5Mlaon/O6JEXgVyjrsySm1X3yHF/ QqBRE8srQeesBEScDlz7uyhVTzJD2/kqkkzATNdXCuF76MkMpxVJVs3rDhx9brfIEf 31EkeYpsUWHkOZfpbmkg5Mrdv8eWDENKgwxM/2dTviFjVE4tAsi9QYndSWOJdOfToX 0vuWo5LA5iZFEeh+YuswfpcsZNepYRRwVx/y18FHkYjtJGaGnwh6eUNlu/fYhpzgrQ REK4ddFSuQq/w== Received: from DHPWEX01.DH-ELECTRONICS.ORG (2001:470:76a7:2::30) by DHPWEX01.DH-ELECTRONICS.ORG (2001:470:76a7:2::30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.858.15; Mon, 2 Aug 2021 16:12:28 +0200 Received: from localhost.localdomain (172.16.51.17) by DHPWEX01.DH-ELECTRONICS.ORG (10.64.2.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.858.15 via Frontend Transport; Mon, 2 Aug 2021 16:12:28 +0200 From: Christoph Niedermaier To: CC: Christoph Niedermaier , Shawn Guo , Fabio Estevam , Marek Vasut , NXP Linux Team , Subject: [PATCH V7 7/7] ARM: dts: imx6qdl-dhcom: Add DHSOM based DRC02 board Date: Mon, 2 Aug 2021 16:10:38 +0200 Message-ID: <20210802141038.59663-7-cniedermaier@dh-electronics.com> X-Mailer: git-send-email 2.11.0 X-klartext: yes In-Reply-To: <20210802141038.59663-1-cniedermaier@dh-electronics.com> References: <20210802141038.59663-1-cniedermaier@dh-electronics.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210802_075803_802475_D610119F X-CRM114-Status: GOOD ( 23.82 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add DT for DH DRC02 unit, which is a universal controller device. The system has two ethernet ports, two CANs, RS485 and RS232, USB, capacitive buttons and an OLED display. Signed-off-by: Christoph Niedermaier Cc: Shawn Guo Cc: Fabio Estevam Cc: Marek Vasut Cc: NXP Linux Team Cc: kernel@dh-electronics.com To: linux-arm-kernel@lists.infradead.org --- V2: - Rebase on Shawn Guos branch for-next V3: - No changes V4: - No changes V5: - No changes V6: - Rebase on 5.14-rc1 V7: - Rebase on Shawn Guos branch for-next - Delete cpu@1 node from cpus --- arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/imx6qdl-dhcom-drc02.dtsi | 139 +++++++++++++++++++++++++++++ arch/arm/boot/dts/imx6s-dhcom-drc02.dts | 30 +++++++ 3 files changed, 171 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/imx6qdl-dhcom-drc02.dtsi create mode 100644 arch/arm/boot/dts/imx6s-dhcom-drc02.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 199bc106627c..bcd1f3853b7d 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -610,7 +610,8 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ imx6qp-tx6qp-8137-mb7.dtb \ imx6qp-vicutp.dtb \ imx6qp-wandboard-revd1.dtb \ - imx6qp-zii-rdu2.dtb + imx6qp-zii-rdu2.dtb \ + imx6s-dhcom-drc02.dtb dtb-$(CONFIG_SOC_IMX6SL) += \ imx6sl-evk.dtb \ imx6sl-tolino-shine2hd.dtb \ diff --git a/arch/arm/boot/dts/imx6qdl-dhcom-drc02.dtsi b/arch/arm/boot/dts/imx6qdl-dhcom-drc02.dtsi new file mode 100644 index 000000000000..3d0a50a9ab21 --- /dev/null +++ b/arch/arm/boot/dts/imx6qdl-dhcom-drc02.dtsi @@ -0,0 +1,139 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2021 DH electronics GmbH + */ + +/ { + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +/* + * Special SoM hardware required which uses the pins from micro SD card. The + * pins SD3_DAT0 and SD3_DAT1 are muxed as can2 Tx and Rx. The signals for can2 + * Tx and Rx are routed to the DHCOM UART1 rts/cts pins. Therefore the micro SD + * card must be disabled and the uart1 rts/cts must be output on other DHCOM + * pins, see uart1 and usdhc3 node below. + */ +&can2 { + status = "okay"; +}; + +&gpio1 { + /* + * NOTE: On DRC02, the RS485_RX_En is controlled by a separate + * GPIO line, however the i.MX6 UART driver assumes RX happens + * during TX anyway and that it only controls drive enable DE + * line. Hence, the RX is always enabled here. + */ + rs485-rx-en-hog { + gpio-hog; + gpios = <18 0>; /* GPIO Q */ + line-name = "rs485-rx-en"; + output-low; + }; +}; + +&gpio3 { + gpio-line-names = + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "DRC02-In1", "", "", "", ""; +}; + +&gpio4 { + gpio-line-names = + "", "", "", "", "", "DHCOM-E", "DRC02-In2", "DHCOM-H", + "DHCOM-I", "DRC02-HW0", "", "", "", "", "", "", + "", "", "", "", "DRC02-Out1", "", "", "", + "", "", "", "", "", "", "", ""; +}; + +&gpio6 { + gpio-line-names = + "", "", "", "DRC02-Out2", "", "", "SOM-HW1", "", + "", "", "", "", "", "", "DRC02-HW2", "DRC02-HW1", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", ""; +}; + +&i2c1 { + eeprom@50 { + compatible = "atmel,24c04"; + reg = <0x50>; + pagesize = <16>; + }; +}; + +&uart1 { + /* + * Due to the use of can2 the signals for can2 Tx and Rx are routed to + * DHCOM UART1 rts/cts pins. Therefore this UART have to use DHCOM GPIOs + * for rts/cts. So configure DHCOM GPIO I as rts and GPIO M as cts. + */ + /delete-property/ uart-has-rtscts; + cts-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; /* GPIO M */ + pinctrl-0 = <&pinctrl_uart1 &pinctrl_dhcom_i &pinctrl_dhcom_m>; + pinctrl-names = "default"; + rts-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* GPIO I */ +}; + +&uart5 { + /* + * On DRC02 this UART is used as RS485 interface and RS485_TX_En is + * controlled by DHCOM GPIO P. So remove rts/cts pins and the property + * uart-has-rtscts from this UART and add the DHCOM GPIO P pin via + * rts-gpios. The RS485_RX_En is controlled by DHCOM GPIO Q, see gpio1 + * node above. + */ + /delete-property/ uart-has-rtscts; + linux,rs485-enabled-at-boot-time; + pinctrl-0 = <&pinctrl_uart5_core &pinctrl_dhcom_p &pinctrl_dhcom_q>; + pinctrl-names = "default"; + rts-gpios = <&gpio7 13 GPIO_ACTIVE_HIGH>; /* GPIO P */ +}; + +&usdhc2 { /* SD card */ + status = "okay"; +}; + +&usdhc3 { + /* + * Due to the use of can2 the micro SD card on module have to be + * disabled, because the pins SD3_DAT0 and SD3_DAT1 are muxed as + * can2 Tx and Rx. + */ + status = "disabled"; +}; + +&iomuxc { + pinctrl-0 = < + /* + * The following DHCOM GPIOs are used on this board. + * Therefore, they have been removed from the list below. + * I: uart1 rts + * M: uart1 cts + * P: uart5 rs485-tx-en + * Q: uart5 rs485-rx-en + */ + &pinctrl_hog_base + &pinctrl_dhcom_a &pinctrl_dhcom_b &pinctrl_dhcom_c + &pinctrl_dhcom_d &pinctrl_dhcom_e &pinctrl_dhcom_f + &pinctrl_dhcom_g &pinctrl_dhcom_h + &pinctrl_dhcom_j &pinctrl_dhcom_k &pinctrl_dhcom_l + &pinctrl_dhcom_n &pinctrl_dhcom_o + &pinctrl_dhcom_r + &pinctrl_dhcom_s &pinctrl_dhcom_t &pinctrl_dhcom_u + &pinctrl_dhcom_v &pinctrl_dhcom_w &pinctrl_dhcom_int + >; + pinctrl-names = "default"; + + pinctrl_uart5_core: uart5-core-grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x1b0b1 + >; + }; +}; diff --git a/arch/arm/boot/dts/imx6s-dhcom-drc02.dts b/arch/arm/boot/dts/imx6s-dhcom-drc02.dts new file mode 100644 index 000000000000..4077b607c29e --- /dev/null +++ b/arch/arm/boot/dts/imx6s-dhcom-drc02.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2021 DH electronics GmbH + * + * DHCOM iMX6 variant: + * DHCM-iMX6S-C0800-R102-F0409-E-CAN2-RTC-I-01D2 + * DHCOM PCB number: 493-400 or newer + * DRC02 PCB number: 568-100 or newer + */ +/dts-v1/; + +/* + * The kernel only distinguishes between i.MX6 Quad and DualLite, + * but the Solo is actually a DualLite with only one CPU. So use + * DualLite for the Solo and disable one CPU node. + */ + +#include "imx6dl.dtsi" +#include "imx6qdl-dhcom-som.dtsi" +#include "imx6qdl-dhcom-drc02.dtsi" + +/ { + model = "DH electronics i.MX6S DHCOM on DRC02"; + compatible = "dh,imx6s-dhcom-drc02", "dh,imx6s-dhcom-som", + "fsl,imx6dl"; + + cpus { + /delete-node/ cpu@1; + }; +};