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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=Ndy6VNY2Oh4Ysf845vj9tsZMixjR9xf1QOuntbi4ZaI=; b=pk0qWQwXxDukpgK3Rc6LqCr3LezY3c3gUYccs+rUdfE/A14/+t191jT0mRZZ5SY8wn pyVBTAuyV+jQh4cX2cFp5Z0Bn5yLzLOSLx2rCraCBS/cXbm1Jfj2ZThgkVwf70RotYTk OvsSNRWDNp0IEY16tsbzgcqPgOhagVE8qWLrcn4DdfbdJYnFZfeGZHgesiQb92UKr14a se0BsY7NQQtRe7bIlJx3+my1WWKWlKiDZWmVouMJLaWS2CaH6UN+qi4ivdf/VScdFCP9 FbLR1zSSNVywWH307ECpT2A/sCrwXWgcQeeVR1Gz9ZxLHKKkEMJoFavFfJiIn98m3nf/ PKQg== X-Gm-Message-State: AOAM532kl+DCj9VYo2SSZ+Na9vM4alufkqz/Eqxf8hZ/vMG+8S/zyWfc JuqgB5X38QxIIEf2gtzQONhkvF2ksw== X-Google-Smtp-Source: ABdhPJyKPDcykD+jZqtrY7F6z2+IYUsvk6Ld/uleTUzz1jiOs7fYD1kJ+7VGHzCekPCIlgM/IBedXZxLDA== X-Received: from tabba.c.googlers.com ([fda3:e722:ac3:cc00:28:9cb1:c0a8:482]) (user=tabba job=sendgmr) by 2002:adf:e788:: with SMTP id n8mr9277808wrm.214.1630059377746; Fri, 27 Aug 2021 03:16:17 -0700 (PDT) Date: Fri, 27 Aug 2021 11:16:04 +0100 In-Reply-To: <20210827101609.2808181-1-tabba@google.com> Message-Id: <20210827101609.2808181-4-tabba@google.com> Mime-Version: 1.0 References: <20210827101609.2808181-1-tabba@google.com> X-Mailer: git-send-email 2.33.0.259.gc128427fd7-goog Subject: [PATCH v5 3/8] KVM: arm64: Simplify masking out MTE in feature id reg From: Fuad Tabba To: kvmarm@lists.cs.columbia.edu Cc: maz@kernel.org, will@kernel.org, james.morse@arm.com, alexandru.elisei@arm.com, suzuki.poulose@arm.com, mark.rutland@arm.com, christoffer.dall@arm.com, pbonzini@redhat.com, drjones@redhat.com, oupton@google.com, qperret@google.com, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel-team@android.com, tabba@google.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210827_031620_639789_5A042F32 X-CRM114-Status: GOOD ( 10.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Simplify code for hiding MTE support in feature id register when MTE is not enabled/supported by KVM. No functional change intended. Signed-off-by: Fuad Tabba Reviewed-by: Andrew Jones --- arch/arm64/kvm/sys_regs.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 1d46e185f31e..447acce9ca84 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -1077,14 +1077,8 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu, val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_CSV3), (u64)vcpu->kvm->arch.pfr0_csv3); break; case SYS_ID_AA64PFR1_EL1: - val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_MTE); - if (kvm_has_mte(vcpu->kvm)) { - u64 pfr, mte; - - pfr = read_sanitised_ftr_reg(SYS_ID_AA64PFR1_EL1); - mte = cpuid_feature_extract_unsigned_field(pfr, ID_AA64PFR1_MTE_SHIFT); - val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR1_MTE), mte); - } + if (!kvm_has_mte(vcpu->kvm)) + val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_MTE); break; case SYS_ID_AA64ISAR1_EL1: if (!vcpu_has_ptrauth(vcpu))