diff mbox series

[v3,09/10] ARM: dts: at91: sama7g5: add node for the ADC

Message ID 20210901123013.329792-10-eugen.hristev@microchip.com (mailing list archive)
State New, archived
Headers show
Series iio: adc: at91-sama5d2_adc: add support for sama7g5 | expand

Commit Message

Eugen Hristev Sept. 1, 2021, 12:30 p.m. UTC
Add node for the ADC controller in sama7g5 SoC.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
---
 arch/arm/boot/dts/sama7g5.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

Comments

Nicolas Ferre Sept. 15, 2021, 9:16 a.m. UTC | #1
On 01/09/2021 at 14:30, Eugen Hristev wrote:
> Add node for the ADC controller in sama7g5 SoC.
> 
> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>

Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>

> ---
>   arch/arm/boot/dts/sama7g5.dtsi | 16 ++++++++++++++++
>   1 file changed, 16 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
> index f9ad5365862f..de960519c72a 100644
> --- a/arch/arm/boot/dts/sama7g5.dtsi
> +++ b/arch/arm/boot/dts/sama7g5.dtsi
> @@ -137,6 +137,22 @@ ps_wdt: watchdog@e001d180 {
>   			clocks = <&clk32k 0>;
>   		};
>   
> +		adc: adc@e1000000 {
> +			compatible = "microchip,sama7g5-adc";
> +			reg = <0xe1000000 0x200>;
> +			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&pmc PMC_TYPE_GCK 26>;
> +			assigned-clocks = <&pmc PMC_TYPE_GCK 26>;
> +			assigned-clock-rates = <100000000>;
> +			clock-names = "adc_clk";
> +			dmas = <&dma0 AT91_XDMAC_DT_PERID(0)>;
> +			dma-names = "rx";
> +			atmel,min-sample-rate-hz = <200000>;
> +			atmel,max-sample-rate-hz = <20000000>;
> +			atmel,startup-time-ms = <4>;
> +			status = "disabled";
> +		};
> +
>   		sdmmc0: mmc@e1204000 {
>   			compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
>   			reg = <0xe1204000 0x4000>;
>
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
index f9ad5365862f..de960519c72a 100644
--- a/arch/arm/boot/dts/sama7g5.dtsi
+++ b/arch/arm/boot/dts/sama7g5.dtsi
@@ -137,6 +137,22 @@  ps_wdt: watchdog@e001d180 {
 			clocks = <&clk32k 0>;
 		};
 
+		adc: adc@e1000000 {
+			compatible = "microchip,sama7g5-adc";
+			reg = <0xe1000000 0x200>;
+			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&pmc PMC_TYPE_GCK 26>;
+			assigned-clocks = <&pmc PMC_TYPE_GCK 26>;
+			assigned-clock-rates = <100000000>;
+			clock-names = "adc_clk";
+			dmas = <&dma0 AT91_XDMAC_DT_PERID(0)>;
+			dma-names = "rx";
+			atmel,min-sample-rate-hz = <200000>;
+			atmel,max-sample-rate-hz = <20000000>;
+			atmel,startup-time-ms = <4>;
+			status = "disabled";
+		};
+
 		sdmmc0: mmc@e1204000 {
 			compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
 			reg = <0xe1204000 0x4000>;