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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=bqVlFpnmP8NmTTti9CdOhbMypDVSrXZ53ek7S7Y13dg=; b=mNelBqiyqIPZ+oVxtMIz0ncmo9kYO8TvBxdhpY2s6AeZJYM5rH1PzWoDvXyDB+dw1m qLJEC8/Bm48pBOfiEsB6ZMLSM8j3ipdORJ92FFTAg/gtrxC7oc2hF7YC/6hNrgZPe9+4 OwkJzE2U+AEu9bbkakavooNQVsjleuDsJSD+DDQ+FmFEQ4Bl+m0CH/2JiMj0ioK8oDqr o4xtc9oLn2qv2EKHu/yRiwKLmYBO53Tm4IbiyTdDZeITqaftJYahtuOL0ffLP0Fzj973 2xxZmRC2toNHaT4Qr//AloG1m7Y5Rj+23F+cGQDAkjBT7GnS1xJrfoN4eJiDFw15+XPU RhmQ== X-Gm-Message-State: AOAM533rdjX4up111O9lnoTPLiMsVYnHE1ONpeuM5h/LvAhFbYmboSvO +C4OtaHyzbifitaCdUy4Z4GbxXgIa0+6 X-Google-Smtp-Source: ABdhPJzGx/trwzoiKd7u6u8XYzmhqnFpS6SWs9oellLrfXtEBkF9rbw+PGJ3ocNzV3eBNmXBmMCTuNw7Qg+j X-Received: from rananta-virt.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:1bcc]) (user=rananta job=sendgmr) by 2002:a65:5887:: with SMTP id d7mr967741pgu.285.1630530870253; Wed, 01 Sep 2021 14:14:30 -0700 (PDT) Date: Wed, 1 Sep 2021 21:14:04 +0000 In-Reply-To: <20210901211412.4171835-1-rananta@google.com> Message-Id: <20210901211412.4171835-5-rananta@google.com> Mime-Version: 1.0 References: <20210901211412.4171835-1-rananta@google.com> X-Mailer: git-send-email 2.33.0.153.gba50c8fa24-goog Subject: [PATCH v3 04/12] KVM: arm64: selftests: Add basic support for arch_timers From: Raghavendra Rao Ananta To: Paolo Bonzini , Marc Zyngier , James Morse , Alexandru Elisei , Suzuki K Poulose Cc: Catalin Marinas , Will Deacon , Peter Shier , Ricardo Koller , Oliver Upton , Reiji Watanabe , Jing Zhang , Raghavendra Rao Anata , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org, kvm@vger.kernel.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210901_141431_975074_25825CF3 X-CRM114-Status: GOOD ( 15.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add a minimalistic library support to access the virtual timers, that can be used for simple timing functionalities, such as introducing delays in the guest. Signed-off-by: Raghavendra Rao Ananta --- .../kvm/include/aarch64/arch_timer.h | 142 ++++++++++++++++++ 1 file changed, 142 insertions(+) create mode 100644 tools/testing/selftests/kvm/include/aarch64/arch_timer.h diff --git a/tools/testing/selftests/kvm/include/aarch64/arch_timer.h b/tools/testing/selftests/kvm/include/aarch64/arch_timer.h new file mode 100644 index 000000000000..9df5b63abc47 --- /dev/null +++ b/tools/testing/selftests/kvm/include/aarch64/arch_timer.h @@ -0,0 +1,142 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * ARM Generic Timer specific interface + */ + +#ifndef SELFTEST_KVM_ARCH_TIMER_H +#define SELFTEST_KVM_ARCH_TIMER_H + +#include "processor.h" + +enum arch_timer { + VIRTUAL, + PHYSICAL, +}; + +#define CTL_ENABLE (1 << 0) +#define CTL_IMASK (1 << 1) +#define CTL_ISTATUS (1 << 2) + +#define msec_to_cycles(msec) \ + (timer_get_cntfrq() * (uint64_t)(msec) / 1000) + +#define usec_to_cycles(usec) \ + (timer_get_cntfrq() * (uint64_t)(usec) / 1000000) + +#define cycles_to_usec(cycles) \ + ((uint64_t)(cycles) * 1000000 / timer_get_cntfrq()) + +static inline uint32_t timer_get_cntfrq(void) +{ + return read_sysreg(cntfrq_el0); +} + +static inline uint64_t timer_get_cntct(enum arch_timer timer) +{ + isb(); + + switch (timer) { + case VIRTUAL: + return read_sysreg(cntvct_el0); + case PHYSICAL: + return read_sysreg(cntpct_el0); + default: + GUEST_ASSERT_1(0, timer); + } + + /* We should not reach here */ + return 0; +} + +static inline void timer_set_cval(enum arch_timer timer, uint64_t cval) +{ + switch (timer) { + case VIRTUAL: + write_sysreg(cntv_cval_el0, cval); + break; + case PHYSICAL: + write_sysreg(cntp_cval_el0, cval); + break; + default: + GUEST_ASSERT_1(0, timer); + } + + isb(); +} + +static inline uint64_t timer_get_cval(enum arch_timer timer) +{ + switch (timer) { + case VIRTUAL: + return read_sysreg(cntv_cval_el0); + case PHYSICAL: + return read_sysreg(cntp_cval_el0); + default: + GUEST_ASSERT_1(0, timer); + } + + /* We should not reach here */ + return 0; +} + +static inline void timer_set_tval(enum arch_timer timer, uint32_t tval) +{ + switch (timer) { + case VIRTUAL: + write_sysreg(cntv_tval_el0, tval); + break; + case PHYSICAL: + write_sysreg(cntp_tval_el0, tval); + break; + default: + GUEST_ASSERT_1(0, timer); + } + + isb(); +} + +static inline void timer_set_ctl(enum arch_timer timer, uint32_t ctl) +{ + switch (timer) { + case VIRTUAL: + write_sysreg(cntv_ctl_el0, ctl); + break; + case PHYSICAL: + write_sysreg(cntp_ctl_el0, ctl); + break; + default: + GUEST_ASSERT_1(0, timer); + } + + isb(); +} + +static inline uint32_t timer_get_ctl(enum arch_timer timer) +{ + switch (timer) { + case VIRTUAL: + return read_sysreg(cntv_ctl_el0); + case PHYSICAL: + return read_sysreg(cntp_ctl_el0); + default: + GUEST_ASSERT_1(0, timer); + } + + /* We should not reach here */ + return 0; +} + +static inline void timer_set_next_cval_ms(enum arch_timer timer, uint32_t msec) +{ + uint64_t now_ct = timer_get_cntct(timer); + uint64_t next_ct = now_ct + msec_to_cycles(msec); + + timer_set_cval(timer, next_ct); +} + +static inline void timer_set_next_tval_ms(enum arch_timer timer, uint32_t msec) +{ + timer_set_tval(timer, msec_to_cycles(msec)); +} + +#endif /* SELFTEST_KVM_ARCH_TIMER_H */