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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=CZEtXXeNpIXSrXo/BVsRgyGrmjyKYgmME4XdGa9+bYM=; b=5iznQlMWwagGlnqft8BfHUN9W1CN1TnHMk6zzjf9TBUkH/6RuiUkSUv5zuCAkiNRBo kKVyFcOtnE0ejH8uvU+Gf+b+yYf1rqDRAiEuA0y0a7JqH8xaeLX0cp8YAWfNA7gz4fWK ztMddunoOzJM3GIKwS5MwC0kq/OXkfnC3b3CgQcvZNdtBgD3pHoIpmaCLqlQYFjyfswe 2/NPHG5g1N9zZV8wzksFkgCffJzu0XDNrIc8ri5xo2jvGXP8Y73ikR669oTB0a5sDR29 dRzKZCZDW3kHY1ubOrWpLCAw87ZwW9SZ5Ymc9gKLSAgq/hno9Kq1m03FbRz0AdEOriY9 Vfrg== X-Gm-Message-State: AOAM531oPnDG02K12cePvE5dfuHJ3siXkrOfhwq6Ro7EZzQEMJXJa8Jr 5ujeWuDXb5A725gJDPxoQX71fPyAtec= X-Google-Smtp-Source: ABdhPJzuML//NrffbdQcWfzCfBHgYs5KCnfRh2zIVPiWAz432/WqTbsx1cxsM3dFyt2dwSgzM6wBATO+55o= X-Received: from oupton.c.googlers.com ([fda3:e722:ac3:cc00:2b:ff92:c0a8:404]) (user=oupton job=sendgmr) by 2002:a25:fc5:: with SMTP id 188mr8465782ybp.51.1631816126794; Thu, 16 Sep 2021 11:15:26 -0700 (PDT) Date: Thu, 16 Sep 2021 18:15:05 +0000 In-Reply-To: <20210916181510.963449-1-oupton@google.com> Message-Id: <20210916181510.963449-4-oupton@google.com> Mime-Version: 1.0 References: <20210916181510.963449-1-oupton@google.com> X-Mailer: git-send-email 2.33.0.464.g1972c5931b-goog Subject: [PATCH v8 3/8] KVM: arm64: Make a helper function to get nr of timer regs From: Oliver Upton To: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu Cc: Paolo Bonzini , Sean Christopherson , Marc Zyngier , Peter Shier , Jim Mattson , David Matlack , Ricardo Koller , Jing Zhang , Raghavendra Rao Anata , James Morse , Alexandru Elisei , Suzuki K Poulose , linux-arm-kernel@lists.infradead.org, Andrew Jones , Will Deacon , Catalin Marinas , Oliver Upton X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210916_111528_668199_9E026A5C X-CRM114-Status: GOOD ( 11.46 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Presently, the number of timer registers is constant. There may be opt-in behavior in KVM that exposes more timer registers to userspace. Prepare for the change by switching from a macro to a helper function to get the number of timer registers. No functional change intended. Signed-off-by: Oliver Upton Reviewed-by: Andrew Jones --- arch/arm64/kvm/guest.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c index 5ce26bedf23c..a13a79f5e0e2 100644 --- a/arch/arm64/kvm/guest.c +++ b/arch/arm64/kvm/guest.c @@ -588,7 +588,10 @@ static unsigned long num_core_regs(const struct kvm_vcpu *vcpu) * ARM64 versions of the TIMER registers, always available on arm64 */ -#define NUM_TIMER_REGS 3 +static inline unsigned long num_timer_regs(struct kvm_vcpu *vcpu) +{ + return 3; +} static bool is_timer_reg(u64 index) { @@ -711,7 +714,7 @@ unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu) res += num_sve_regs(vcpu); res += kvm_arm_num_sys_reg_descs(vcpu); res += kvm_arm_get_fw_num_regs(vcpu); - res += NUM_TIMER_REGS; + res += num_timer_regs(vcpu); return res; } @@ -743,7 +746,7 @@ int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices) ret = copy_timer_indices(vcpu, uindices); if (ret < 0) return ret; - uindices += NUM_TIMER_REGS; + uindices += num_timer_regs(vcpu); return kvm_arm_copy_sys_reg_indices(vcpu, uindices); }