From patchwork Thu Sep 16 23:13:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pasha Tatashin X-Patchwork-Id: 12500489 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8CCBC433F5 for ; Thu, 16 Sep 2021 23:17:12 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9781B61029 for ; Thu, 16 Sep 2021 23:17:12 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 9781B61029 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=soleen.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=jgHIHbWJ2cvvQGn0uKl6D5EdLkS3kwi+5UXx8pQPyTw=; b=cPSSJ4Sl8Qkk6l 4qH63GcSInxTLEpuv+5pEJx4fntt4IFvmlQJ6JoJOk1i0TutGRLVnnu8aQb+lvr8Ol2rOXT/pG60n dcbNATdvFQphgrZH0VUl0J/vZ27DZiMMimsiWBT9iev8qsKTMvlJv4Sd249c1AbAQdAT80IIcB/gq 9ontAL8QhkWmaS6dNJLQ/MtAjczN/WjoaPgX4mdYD8iZPWommtJBpOg5fwR/ZnRySUkXxfJls4Hrd 7A6kIc8vdt+ScebYY5UV/48kIqlrRp3eMlrgqXgYOra78KU1pkSQoJMQEvdVXkJdgM/mm84ljUUFE jYae8iBgn6Yp28U5vlnQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mR0bC-00Catv-Vd; Thu, 16 Sep 2021 23:15:23 +0000 Received: from mail-qk1-x729.google.com ([2607:f8b0:4864:20::729]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mR0ZW-00Ca7g-7t for linux-arm-kernel@lists.infradead.org; Thu, 16 Sep 2021 23:13:40 +0000 Received: by mail-qk1-x729.google.com with SMTP id ay33so11583825qkb.10 for ; Thu, 16 Sep 2021 16:13:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=soleen.com; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=exeHdjIsxyGc1OZ7fPc2yLNva0RUnn224iKjfeO/Tps=; b=csh+0NjNjXq4xVbHcgfV0tkZaYVDDxnR+KyTpl/TMfJf1Bcqjh8iGnlSYcecebap8G 6k/safqs9PVQDTztgaPl40nThhrfZi5ed4IK8xePB0T8Sa8MYs+aXBV//x3Fck3k2iV9 6a5XjOPT7Lwu25MAGF1c0z2M3Lw/EqJOfJm5d0CoIPTkZth5NctzNRz9VHjYtnSocyrL j31/z+Tl0HcwZVo7n036pWZYjyzxJP7gLbRfZBIkFGRKsYORdyu9Krb9oPdMxFVUemfr nJA+7UTbw0/PsRDqMlZmUc/nfCSJ196huH92bsDYJpqgAJN94ges86+cyx1CJDz6CLvi fijg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=exeHdjIsxyGc1OZ7fPc2yLNva0RUnn224iKjfeO/Tps=; b=CQTjCDDW+BWwM/rmkjF/7zxsKtRM1sOGgI/SdLo6/xjcep/h+T+lf3vl45LfXjOke2 5+yolimmCG00bflX21WUsQ6/4UluooLqTZ4iuI2ew9LpjI5Z10fvYDnC/rk5LfuxBewD 0X5YKEmhYbn02/JRZiDSe9hV5d/bZj/750q0eKCMj5+x7I8JOXi6z1M56HlLc+EKnhNw jMyMkh7sFGiCjrcRmZlfqA4H/nBMV1hSJ616TJUx2GZDFWzpohZinj8ss+uTPjjfAgoC 5IiVq4N/hhE/NnSqlZTSkPB1yZphZsWKJ3NjkqMevPysRcjhn5JdauHBWd4oK+A0d9MZ MTTQ== X-Gm-Message-State: AOAM533N229Br07EvWQDLgEpEFvpiH01zSbW4LW07YtNLnuTsbMPNslp DNdGGBiu3ZAdP4ihJWM6ivYUUQ== X-Google-Smtp-Source: ABdhPJyjBUpS0VkoacHlSf0TOrxrLfXY2aEqHlMPIXlkIZ7kOCY/abeaLzU3ssMdOIXsPkRjrkDvCQ== X-Received: by 2002:a37:68d0:: with SMTP id d199mr7411119qkc.96.1631834016835; Thu, 16 Sep 2021 16:13:36 -0700 (PDT) Received: from localhost.localdomain (c-73-69-118-222.hsd1.nh.comcast.net. [73.69.118.222]) by smtp.gmail.com with ESMTPSA id az6sm3312891qkb.70.2021.09.16.16.13.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Sep 2021 16:13:36 -0700 (PDT) From: Pasha Tatashin To: pasha.tatashin@soleen.com, jmorris@namei.org, sashal@kernel.org, ebiederm@xmission.com, kexec@lists.infradead.org, linux-kernel@vger.kernel.org, corbet@lwn.net, catalin.marinas@arm.com, will@kernel.org, linux-arm-kernel@lists.infradead.org, maz@kernel.org, james.morse@arm.com, vladimir.murzin@arm.com, matthias.bgg@gmail.com, linux-mm@kvack.org, mark.rutland@arm.com, steve.capper@arm.com, rfontana@redhat.com, tglx@linutronix.de, selindag@gmail.com, tyhicks@linux.microsoft.com, kernelfans@gmail.com, akpm@linux-foundation.org, madvenka@linux.microsoft.com Subject: [PATCH v17 06/15] arm64: kexec: Use dcache ops macros instead of open-coding Date: Thu, 16 Sep 2021 19:13:16 -0400 Message-Id: <20210916231325.125533-7-pasha.tatashin@soleen.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210916231325.125533-1-pasha.tatashin@soleen.com> References: <20210916231325.125533-1-pasha.tatashin@soleen.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210916_161338_439441_379812DD X-CRM114-Status: GOOD ( 14.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org kexec does dcache maintenance when it re-writes all memory. Our dcache_by_line_op macro depends on reading the sanitized DminLine from memory. Kexec may have overwritten this, so open-codes the sequence. dcache_by_line_op is a whole set of macros, it uses dcache_line_size which uses read_ctr for the sanitsed DminLine. Reading the DminLine is the first thing the dcache_by_line_op does. Rename dcache_by_line_op dcache_by_myline_op and take DminLine as an argument. Kexec can now use the slightly smaller macro. This makes up-coming changes to the dcache maintenance easier on the eye. Code generated by the existing callers is unchanged. Suggested-by: James Morse Signed-off-by: Pasha Tatashin --- arch/arm64/include/asm/assembler.h | 30 ++++++++++++++++++++++------- arch/arm64/kernel/relocate_kernel.S | 13 +++---------- 2 files changed, 26 insertions(+), 17 deletions(-) diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h index 89faca0e740d..71999a325055 100644 --- a/arch/arm64/include/asm/assembler.h +++ b/arch/arm64/include/asm/assembler.h @@ -405,19 +405,19 @@ alternative_endif /* * Macro to perform a data cache maintenance for the interval - * [start, end) + * [start, end) with dcache line size explicitly provided. * * op: operation passed to dc instruction * domain: domain used in dsb instruciton * start: starting virtual address of the region * end: end virtual address of the region + * linesz: dcache line size * fixup: optional label to branch to on user fault - * Corrupts: start, end, tmp1, tmp2 + * Corrupts: start, end, tmp */ - .macro dcache_by_line_op op, domain, start, end, tmp1, tmp2, fixup - dcache_line_size \tmp1, \tmp2 - sub \tmp2, \tmp1, #1 - bic \start, \start, \tmp2 + .macro dcache_by_myline_op op, domain, start, end, linesz, tmp, fixup + sub \tmp, \linesz, #1 + bic \start, \start, \tmp .Ldcache_op\@: .ifc \op, cvau __dcache_op_workaround_clean_cache \op, \start @@ -436,7 +436,7 @@ alternative_endif .endif .endif .endif - add \start, \start, \tmp1 + add \start, \start, \linesz cmp \start, \end b.lo .Ldcache_op\@ dsb \domain @@ -444,6 +444,22 @@ alternative_endif _cond_extable .Ldcache_op\@, \fixup .endm +/* + * Macro to perform a data cache maintenance for the interval + * [start, end) + * + * op: operation passed to dc instruction + * domain: domain used in dsb instruciton + * start: starting virtual address of the region + * end: end virtual address of the region + * fixup: optional label to branch to on user fault + * Corrupts: start, end, tmp1, tmp2 + */ + .macro dcache_by_line_op op, domain, start, end, tmp1, tmp2, fixup + dcache_line_size \tmp1, \tmp2 + dcache_by_myline_op \op, \domain, \start, \end, \tmp1, \tmp2, \fixup + .endm + /* * Macro to perform an instruction cache maintenance for the interval * [start, end) diff --git a/arch/arm64/kernel/relocate_kernel.S b/arch/arm64/kernel/relocate_kernel.S index 8058fabe0a76..8c43779e8cc6 100644 --- a/arch/arm64/kernel/relocate_kernel.S +++ b/arch/arm64/kernel/relocate_kernel.S @@ -41,16 +41,9 @@ SYM_CODE_START(arm64_relocate_new_kernel) tbz x16, IND_SOURCE_BIT, .Ltest_indirection /* Invalidate dest page to PoC. */ - mov x2, x13 - add x20, x2, #PAGE_SIZE - sub x1, x15, #1 - bic x2, x2, x1 -2: dc ivac, x2 - add x2, x2, x15 - cmp x2, x20 - b.lo 2b - dsb sy - + mov x2, x13 + add x1, x2, #PAGE_SIZE + dcache_by_myline_op ivac, sy, x2, x1, x15, x20 copy_page x13, x12, x1, x2, x3, x4, x5, x6, x7, x8 b .Lnext .Ltest_indirection: