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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=+XjKwBEU8XHurAeXBX8jHTz51rXfXyCyxwuOVOoJtgE=; b=yIcpW0aQYvFSzo4gwxP501faGF9yuQudxI/kLa/IgRCTKzM9w35apqfN404RObz5/c AxTEOhCs2P2+bAfzNPmEHj+00YnU5cu62Lv+rVB1KlizPfTUHv2UpgYSGjlHogMEwrUZ 6H2qzhcnw7LWnzYT9q4vKTGIyMz1oeOGWecVCDBnzaw4GOpDgN8PFTn6tyHmDdq8J7kj 3X9F91Wz3WQ9eqB6rbf57+7JpJjJpQHdkGVjLhWDmaeh2YcnsIymEPY9T7viYXEbAenC EIcRXPHYrdT1b7D6WQ4x4yl+PzAL4D8tcRba4+RylHTwS3R0X5h5OhOFJ5autCJrzzWk +eoA== X-Gm-Message-State: AOAM530PNG+C/Tgd06gaFa+iRZTtsGRPGr5YKo9pllny6j6vsIW62lAj k7tEq5osPkozezeu85veOLakMlr5aQ== X-Google-Smtp-Source: ABdhPJy8aSobofh0Qai9hz2nCfb+UCZ9fXyZoPgAPtLb/DlaFbORkM5gtPL+Ayu+m1LXY6nESzHqO+khOw== X-Received: from tabba.c.googlers.com ([fda3:e722:ac3:cc00:28:9cb1:c0a8:482]) (user=tabba job=sendgmr) by 2002:a0c:f10b:: with SMTP id i11mr36186303qvl.67.1632314841458; Wed, 22 Sep 2021 05:47:21 -0700 (PDT) Date: Wed, 22 Sep 2021 13:46:59 +0100 In-Reply-To: <20210922124704.600087-1-tabba@google.com> Message-Id: <20210922124704.600087-8-tabba@google.com> Mime-Version: 1.0 References: <20210922124704.600087-1-tabba@google.com> X-Mailer: git-send-email 2.33.0.464.g1972c5931b-goog Subject: [PATCH v6 07/12] KVM: arm64: Simplify masking out MTE in feature id reg From: Fuad Tabba To: kvmarm@lists.cs.columbia.edu Cc: maz@kernel.org, will@kernel.org, james.morse@arm.com, alexandru.elisei@arm.com, suzuki.poulose@arm.com, mark.rutland@arm.com, christoffer.dall@arm.com, pbonzini@redhat.com, drjones@redhat.com, oupton@google.com, qperret@google.com, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel-team@android.com, tabba@google.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210922_054723_139440_B4CD9157 X-CRM114-Status: GOOD ( 11.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Simplify code for hiding MTE support in feature id register when MTE is not enabled/supported by KVM. No functional change intended. Signed-off-by: Fuad Tabba Reviewed-by: Andrew Jones --- arch/arm64/kvm/sys_regs.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 1d46e185f31e..447acce9ca84 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -1077,14 +1077,8 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu, val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_CSV3), (u64)vcpu->kvm->arch.pfr0_csv3); break; case SYS_ID_AA64PFR1_EL1: - val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_MTE); - if (kvm_has_mte(vcpu->kvm)) { - u64 pfr, mte; - - pfr = read_sanitised_ftr_reg(SYS_ID_AA64PFR1_EL1); - mte = cpuid_feature_extract_unsigned_field(pfr, ID_AA64PFR1_MTE_SHIFT); - val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR1_MTE), mte); - } + if (!kvm_has_mte(vcpu->kvm)) + val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_MTE); break; case SYS_ID_AA64ISAR1_EL1: if (!vcpu_has_ptrauth(vcpu))