From patchwork Tue Sep 28 23:56:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William McVicker X-Patchwork-Id: 12524185 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 43649C433EF for ; Wed, 29 Sep 2021 00:00:39 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0C57F613A0 for ; Wed, 29 Sep 2021 00:00:39 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 0C57F613A0 Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=google.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:References: Mime-Version:Message-Id:In-Reply-To:Date:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=MAPSrfEH2cC5PS50ScObkt8wG4pNUXWbW/WjIijK5Iw=; b=0KyPoUBX+h1O61XNIWgNhvdly6 8GWE6sMdEnnrPDIw4Qn0K70RPz7MJxwrA08ff9GW1sYqXRzOO7vZLXlMtT36Cm2VthmCktKfdjBYE 15DIbYfXHR3X3toRra0ohSoZttCgvNH2ODR12kAcxB35HUJk8wXL3AabafFh9WM0/+4uIgm6lc0Iv OuNPfC5UntcL7AWddXygNNU22a0IFy0SdbJK4Gg6c0qZn703NX4UEKJR6yQiudOAQ8NNpwNPXg7K3 wRhYq8HAFpNPhqdtQ1peKy/uTV6yhx6+/E9BNyZX0I0oXqJJ4Dle1/XrwuapFInrFiWxTt06SeYPQ iLXsXliA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mVMyd-009NXd-2S; Tue, 28 Sep 2021 23:57:35 +0000 Received: from mail-pj1-x1049.google.com ([2607:f8b0:4864:20::1049]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mVMy5-009NNX-QV for linux-arm-kernel@lists.infradead.org; Tue, 28 Sep 2021 23:57:03 +0000 Received: by mail-pj1-x1049.google.com with SMTP id h9-20020a17090a470900b001791c0352aaso291996pjg.2 for ; Tue, 28 Sep 2021 16:56:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=A8qNzCNapMxw2jtmX47pKK84lMS41znzFOgk5hTsT4g=; b=rEo7ZDk5e74TCZBbSEUciWvSKxRQt3AIRdoY/S4aknlZO6vJvuU71n003Fc6U8WYth 0kHrD/+d368nV17Q41I0GkP3xTCrlv8locgEp+y/zMuLznOMvYWEN+PPQznKHGoR1qwW 5ud0uIR1ymaCY67XvJWUyz4g6h/cV3RcVB5tL1z/9Fg24KaHkZ25ldxkUJcT2SmvXUY+ kZzVFsAcvtCEQAq6Vpjq5TdtIUyJh6TM6caJoAuvOJ7N2eOxGyi6a69qKunyA9Q98+EP pgCavuUeDMhoN70PAK08NwPgPm6cuBogJkWbzdO+vzmo9n3wqNgV7No4YROJsrnwFxYo O1Ig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=A8qNzCNapMxw2jtmX47pKK84lMS41znzFOgk5hTsT4g=; b=DJgMfDXCYpwlarjx4Dl4M4Mj85/Edr0BAzY/dEbOfaA2MQuIq4C8JInqLAzTxAC8Ts uIoJOYC2EP7jXmO7VUASYclqQ0PPQkKloYv7WiMDZ2sZqWTQYQcqIYYzI0sciPCK8gLT AYFEHH+Eo8u7L6Z4R2V4R6sft1TaDbzgS1DyLoEmpx9WxSdp9KB7IHm26NEWJDRXBm74 yesqqE5dJ2+wnShSI2Ov17GZiQyi0ETgIsgXDbm0Rmpx+sqyBzSOPHW1OM+ETm2JZ5MK +HAkqiua5jWRFZkRs+wJ2SDntrDBwX32+oNs4t+nmY6Kd11cy7ahV8zPp2Db0QNIx72g fQTA== X-Gm-Message-State: AOAM531s6xF5s6a/cLtyOfh3A7Wd9VAkDFxInqq9ssNsUc4x0lQMlT/v 3BFQhv7eKCxrqZr7J39nK0bVuwMGALfs5g+VLkY= X-Google-Smtp-Source: ABdhPJwRgu3AvnXGjTVwA8JT01BkJv7hKMCFR0qy8+4P5LRuXfn4cDD3Trc0z1P2c4Oy7QYgSjVQOIaQWfZ46jPwhNE= X-Received: from willmcvicker.c.googlers.com ([fda3:e722:ac3:cc00:24:72f4:c0a8:2dd0]) (user=willmcvicker job=sendgmr) by 2002:a17:902:7e05:b0:13d:e01a:be5f with SMTP id b5-20020a1709027e0500b0013de01abe5fmr243419plm.56.1632873417456; Tue, 28 Sep 2021 16:56:57 -0700 (PDT) Date: Tue, 28 Sep 2021 23:56:20 +0000 In-Reply-To: <20210928235635.1348330-1-willmcvicker@google.com> Message-Id: <20210928235635.1348330-4-willmcvicker@google.com> Mime-Version: 1.0 References: <20210928235635.1348330-1-willmcvicker@google.com> X-Mailer: git-send-email 2.33.0.685.g46640cef36-goog Subject: [PATCH v2 03/12] clk: samsung: add support for CPU clocks From: Will McVicker To: Russell King , Krzysztof Kozlowski , Catalin Marinas , Will Deacon , Michael Turquette , Stephen Boyd , Sylwester Nawrocki , Tomasz Figa , Chanwoo Choi , Linus Walleij , Alessandro Zummo , Alexandre Belloni , John Stultz , Thomas Gleixner Cc: Lee Jones , Geert Uytterhoeven , Saravana Kannan , Will McVicker , kernel-team@android.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-rtc@vger.kernel.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210928_165701_890820_C02D2526 X-CRM114-Status: GOOD ( 20.25 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Adds 'struct samsung_cpu_clock' and correpsonding code to the samsung common clk driver. This allows drivers to register their CPU clocks with the samsung_cmu_register_one() API. Signed-off-by: Will McVicker --- drivers/clk/samsung/clk-cpu.c | 26 ++++++++++++++++++++++++++ drivers/clk/samsung/clk.c | 2 ++ drivers/clk/samsung/clk.h | 26 ++++++++++++++++++++++++++ 3 files changed, 54 insertions(+) diff --git a/drivers/clk/samsung/clk-cpu.c b/drivers/clk/samsung/clk-cpu.c index 00ef4d1b0888..b5017934fc41 100644 --- a/drivers/clk/samsung/clk-cpu.c +++ b/drivers/clk/samsung/clk-cpu.c @@ -469,3 +469,29 @@ int __init exynos_register_cpu_clock(struct samsung_clk_provider *ctx, kfree(cpuclk); return ret; } + +void samsung_clk_register_cpu(struct samsung_clk_provider *ctx, + const struct samsung_cpu_clock *list, unsigned int nr_clk) +{ + unsigned int idx; + unsigned int num_cfgs; + struct clk *parent_clk, *alt_parent_clk; + const struct clk_hw *parent_clk_hw = NULL; + const struct clk_hw *alt_parent_clk_hw = NULL; + + for (idx = 0; idx < nr_clk; idx++, list++) { + /* find count of configuration rates in cfg */ + for (num_cfgs = 0; list->cfg[num_cfgs].prate != 0; ) + num_cfgs++; + + parent_clk = __clk_lookup(list->parent_name); + if (parent_clk) + parent_clk_hw = __clk_get_hw(parent_clk); + alt_parent_clk = __clk_lookup(list->alt_parent_name); + if (alt_parent_clk) + alt_parent_clk_hw = __clk_get_hw(alt_parent_clk); + + exynos_register_cpu_clock(ctx, list->id, list->name, parent_clk_hw, + alt_parent_clk_hw, list->offset, list->cfg, num_cfgs, list->flags); + } +} diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c index 1949ae7851b2..336243c6f120 100644 --- a/drivers/clk/samsung/clk.c +++ b/drivers/clk/samsung/clk.c @@ -378,6 +378,8 @@ struct samsung_clk_provider * __init samsung_cmu_register_one( samsung_clk_extended_sleep_init(reg_base, cmu->clk_regs, cmu->nr_clk_regs, cmu->suspend_regs, cmu->nr_suspend_regs); + if (cmu->cpu_clks) + samsung_clk_register_cpu(ctx, cmu->cpu_clks, cmu->nr_cpu_clks); samsung_clk_of_add_provider(np, ctx); diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h index c1e1a6b2f499..a52a38cc1740 100644 --- a/drivers/clk/samsung/clk.h +++ b/drivers/clk/samsung/clk.h @@ -271,6 +271,27 @@ struct samsung_pll_clock { __PLL(_typ, _id, _name, _pname, CLK_GET_RATE_NOCACHE, _lock, \ _con, _rtable) +struct samsung_cpu_clock { + unsigned int id; + const char *name; + const char *parent_name; + const char *alt_parent_name; + unsigned long flags; + int offset; + const struct exynos_cpuclk_cfg_data *cfg; +}; + +#define CPU_CLK(_id, _name, _pname, _apname, _flags, _offset, _cfg) \ + { \ + .id = _id, \ + .name = _name, \ + .parent_name = _pname, \ + .alt_parent_name = _apname, \ + .flags = _flags, \ + .offset = _offset, \ + .cfg = _cfg, \ + } + struct samsung_clock_reg_cache { struct list_head node; void __iomem *reg_base; @@ -301,6 +322,9 @@ struct samsung_cmu_info { unsigned int nr_fixed_factor_clks; /* total number of clocks with IDs assigned*/ unsigned int nr_clk_ids; + /* list of cpu clocks and respective count */ + const struct samsung_cpu_clock *cpu_clks; + unsigned int nr_cpu_clks; /* list and number of clocks registers */ const unsigned long *clk_regs; @@ -350,6 +374,8 @@ extern void __init samsung_clk_register_gate(struct samsung_clk_provider *ctx, extern void __init samsung_clk_register_pll(struct samsung_clk_provider *ctx, const struct samsung_pll_clock *pll_list, unsigned int nr_clk, void __iomem *base); +extern void __init samsung_clk_register_cpu(struct samsung_clk_provider *ctx, + const struct samsung_cpu_clock *list, unsigned int nr_clk); extern struct samsung_clk_provider __init *samsung_cmu_register_one( struct device_node *,