From patchwork Wed Oct 6 09:49:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Lindgren X-Patchwork-Id: 12538941 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08CE7C433F5 for ; Wed, 6 Oct 2021 09:51:41 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D1DB561131 for ; Wed, 6 Oct 2021 09:51:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org D1DB561131 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=atomide.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=l7OliyYMembl8/DZrhn3gQOOar5cUMwNPKcpX3O1iQc=; b=Lv+gxp9gAtr56k YXebNPcl1KtKGjEMMHYSwQKGG8GnWuH5px2QvYHng4JZ4fE4j1+gfDUwMp/goHq0AvGgXz3sEN7ey nKDyPdrX/jwEADCCSbKffCL87iT3w0QiC1MCZYb6ueCy5bKyyQDCsjReVgODlvABwiu+vgNiloEbe Z5zj2orST7moMJDRPHmW5GCDgzfzVJkCuVkudcKyP22PUL4bF9aFuI+OliJFLVc4avkeTwNpejxaa dWCK9qLhXdCisvNXXL2UOEZMBrXJdGIUA0O70gnbnwF3iiIRJhhbjrRBUdQavaVNQLNhlJnsFOLXc n+fuBeaxHroy5HpFgACw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mY3YZ-00Dft0-LD; Wed, 06 Oct 2021 09:49:47 +0000 Received: from muru.com ([72.249.23.125]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mY3YA-00DfmE-Fp for linux-arm-kernel@lists.infradead.org; Wed, 06 Oct 2021 09:49:24 +0000 Received: from hillo.muru.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTP id 69ECD81B7; Wed, 6 Oct 2021 09:49:52 +0000 (UTC) From: Tony Lindgren To: linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Subject: [PATCH 4/9] ARM: OMAP2+: Drop unused PRM defines for am4 Date: Wed, 6 Oct 2021 12:49:10 +0300 Message-Id: <20211006094915.15339-5-tony@atomide.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211006094915.15339-1-tony@atomide.com> References: <20211006094915.15339-1-tony@atomide.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211006_024922_606379_F4D627CF X-CRM114-Status: UNSURE ( 8.42 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org These are unused and should be handled by drivers/soc/ti/omap_prm.c driver nowadays. Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/prcm43xx.h | 94 ---------------------------------- 1 file changed, 94 deletions(-) diff --git a/arch/arm/mach-omap2/prcm43xx.h b/arch/arm/mach-omap2/prcm43xx.h --- a/arch/arm/mach-omap2/prcm43xx.h +++ b/arch/arm/mach-omap2/prcm43xx.h @@ -32,20 +32,8 @@ /* Other PRM offsets */ #define AM43XX_PRM_IO_PMCTRL_OFFSET 0x0024 -/* RM RSTCTRL offsets */ -#define AM43XX_RM_PER_RSTCTRL_OFFSET 0x0010 -#define AM43XX_RM_GFX_RSTCTRL_OFFSET 0x0010 -#define AM43XX_RM_WKUP_RSTCTRL_OFFSET 0x0010 - -/* RM RSTST offsets */ -#define AM43XX_RM_GFX_RSTST_OFFSET 0x0014 -#define AM43XX_RM_PER_RSTST_OFFSET 0x0014 -#define AM43XX_RM_WKUP_RSTST_OFFSET 0x0014 - /* CM instances */ #define AM43XX_CM_WKUP_INST 0x2800 -#define AM43XX_CM_DEVICE_INST 0x4100 -#define AM43XX_CM_DPLL_INST 0x4200 #define AM43XX_CM_MPU_INST 0x8300 #define AM43XX_CM_GFX_INST 0x8400 #define AM43XX_CM_RTC_INST 0x8500 @@ -74,89 +62,7 @@ #define AM43XX_CM_PER_OCPWP_L3_CDOFFS 0x0c00 /* CLK CTRL offsets */ -#define AM43XX_CM_PER_UART1_CLKCTRL_OFFSET 0x0580 -#define AM43XX_CM_PER_UART2_CLKCTRL_OFFSET 0x0588 -#define AM43XX_CM_PER_UART3_CLKCTRL_OFFSET 0x0590 -#define AM43XX_CM_PER_UART4_CLKCTRL_OFFSET 0x0598 -#define AM43XX_CM_PER_UART5_CLKCTRL_OFFSET 0x05a0 -#define AM43XX_CM_PER_DCAN0_CLKCTRL_OFFSET 0x0428 -#define AM43XX_CM_PER_DCAN1_CLKCTRL_OFFSET 0x0430 -#define AM43XX_CM_PER_ELM_CLKCTRL_OFFSET 0x0468 -#define AM43XX_CM_PER_EPWMSS0_CLKCTRL_OFFSET 0x0438 -#define AM43XX_CM_PER_EPWMSS1_CLKCTRL_OFFSET 0x0440 -#define AM43XX_CM_PER_EPWMSS2_CLKCTRL_OFFSET 0x0448 -#define AM43XX_CM_PER_GPIO1_CLKCTRL_OFFSET 0x0478 -#define AM43XX_CM_PER_GPIO2_CLKCTRL_OFFSET 0x0480 -#define AM43XX_CM_PER_GPIO3_CLKCTRL_OFFSET 0x0488 -#define AM43XX_CM_PER_I2C1_CLKCTRL_OFFSET 0x04a8 -#define AM43XX_CM_PER_I2C2_CLKCTRL_OFFSET 0x04b0 -#define AM43XX_CM_PER_MAILBOX0_CLKCTRL_OFFSET 0x04b8 -#define AM43XX_CM_PER_MMC0_CLKCTRL_OFFSET 0x04c0 -#define AM43XX_CM_PER_MMC1_CLKCTRL_OFFSET 0x04c8 -#define AM43XX_CM_PER_RNG_CLKCTRL_OFFSET 0x04e0 -#define AM43XX_CM_PER_SPI0_CLKCTRL_OFFSET 0x0500 -#define AM43XX_CM_PER_SPI1_CLKCTRL_OFFSET 0x0508 -#define AM43XX_CM_PER_SPINLOCK_CLKCTRL_OFFSET 0x0528 -#define AM43XX_CM_PER_TIMER2_CLKCTRL_OFFSET 0x0530 -#define AM43XX_CM_PER_TIMER3_CLKCTRL_OFFSET 0x0538 -#define AM43XX_CM_PER_TIMER4_CLKCTRL_OFFSET 0x0540 -#define AM43XX_CM_PER_TIMER5_CLKCTRL_OFFSET 0x0548 -#define AM43XX_CM_PER_TIMER6_CLKCTRL_OFFSET 0x0550 -#define AM43XX_CM_PER_TIMER7_CLKCTRL_OFFSET 0x0558 -#define AM43XX_CM_WKUP_WKUP_M3_CLKCTRL_OFFSET 0x0228 -#define AM43XX_CM_WKUP_CONTROL_CLKCTRL_OFFSET 0x0360 -#define AM43XX_CM_WKUP_SMARTREFLEX0_CLKCTRL_OFFSET 0x0350 -#define AM43XX_CM_WKUP_SMARTREFLEX1_CLKCTRL_OFFSET 0x0358 -#define AM43XX_CM_WKUP_UART0_CLKCTRL_OFFSET 0x0348 -#define AM43XX_CM_WKUP_TIMER1_CLKCTRL_OFFSET 0x0328 -#define AM43XX_CM_WKUP_I2C0_CLKCTRL_OFFSET 0x0340 -#define AM43XX_CM_WKUP_GPIO0_CLKCTRL_OFFSET 0x0368 -#define AM43XX_CM_WKUP_ADC_TSC_CLKCTRL_OFFSET 0x0120 -#define AM43XX_CM_WKUP_WDT1_CLKCTRL_OFFSET 0x0338 -#define AM43XX_CM_WKUP_L4WKUP_CLKCTRL_OFFSET 0x0220 -#define AM43XX_CM_RTC_RTC_CLKCTRL_OFFSET 0x0020 -#define AM43XX_CM_PER_MMC2_CLKCTRL_OFFSET 0x0248 -#define AM43XX_CM_PER_QSPI_CLKCTRL_OFFSET 0x0258 -#define AM43XX_CM_PER_GPMC_CLKCTRL_OFFSET 0x0220 -#define AM43XX_CM_PER_MCASP0_CLKCTRL_OFFSET 0x0238 -#define AM43XX_CM_PER_MCASP1_CLKCTRL_OFFSET 0x0240 -#define AM43XX_CM_PER_L4LS_CLKCTRL_OFFSET 0x0420 -#define AM43XX_CM_PER_L3_CLKCTRL_OFFSET 0x0020 -#define AM43XX_CM_PER_TPCC_CLKCTRL_OFFSET 0x0078 -#define AM43XX_CM_PER_TPTC0_CLKCTRL_OFFSET 0x0080 -#define AM43XX_CM_PER_TPTC1_CLKCTRL_OFFSET 0x0088 -#define AM43XX_CM_PER_TPTC2_CLKCTRL_OFFSET 0x0090 -#define AM43XX_CM_PER_CPGMAC0_CLKCTRL_OFFSET 0x0b20 -#define AM43XX_CM_PER_PRUSS_CLKCTRL_OFFSET 0x0320 -#define AM43XX_CM_GFX_GFX_CLKCTRL_OFFSET 0x0020 -#define AM43XX_CM_PER_L4HS_CLKCTRL_OFFSET 0x00a0 #define AM43XX_CM_MPU_MPU_CLKCTRL_OFFSET 0x0020 -#define AM43XX_CM_PER_L3_INSTR_CLKCTRL_OFFSET 0x0040 -#define AM43XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET 0x0050 -#define AM43XX_CM_PER_SHA0_CLKCTRL_OFFSET 0x0058 -#define AM43XX_CM_PER_AES0_CLKCTRL_OFFSET 0x0028 -#define AM43XX_CM_PER_DES_CLKCTRL_OFFSET 0x0030 -#define AM43XX_CM_PER_TIMER8_CLKCTRL_OFFSET 0x0560 -#define AM43XX_CM_PER_TIMER9_CLKCTRL_OFFSET 0x0568 -#define AM43XX_CM_PER_TIMER10_CLKCTRL_OFFSET 0x0570 -#define AM43XX_CM_PER_TIMER11_CLKCTRL_OFFSET 0x0578 -#define AM43XX_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET 0x0230 -#define AM43XX_CM_PER_EPWMSS3_CLKCTRL_OFFSET 0x0450 -#define AM43XX_CM_PER_EPWMSS4_CLKCTRL_OFFSET 0x0458 -#define AM43XX_CM_PER_EPWMSS5_CLKCTRL_OFFSET 0x0460 -#define AM43XX_CM_PER_SPI2_CLKCTRL_OFFSET 0x0510 -#define AM43XX_CM_PER_SPI3_CLKCTRL_OFFSET 0x0518 -#define AM43XX_CM_PER_SPI4_CLKCTRL_OFFSET 0x0520 -#define AM43XX_CM_PER_GPIO4_CLKCTRL_OFFSET 0x0490 -#define AM43XX_CM_PER_GPIO5_CLKCTRL_OFFSET 0x0498 -#define AM43XX_CM_PER_USB_OTG_SS0_CLKCTRL_OFFSET 0x0260 -#define AM43XX_CM_PER_USBPHYOCP2SCP0_CLKCTRL_OFFSET 0x05B8 -#define AM43XX_CM_PER_USB_OTG_SS1_CLKCTRL_OFFSET 0x0268 -#define AM43XX_CM_PER_USBPHYOCP2SCP1_CLKCTRL_OFFSET 0x05C0 -#define AM43XX_CM_PER_DSS_CLKCTRL_OFFSET 0x0a20 -#define AM43XX_CM_PER_HDQ1W_CLKCTRL_OFFSET 0x04a0 -#define AM43XX_CM_PER_VPFE0_CLKCTRL_OFFSET 0x0068 -#define AM43XX_CM_PER_VPFE1_CLKCTRL_OFFSET 0x0070 #define AM43XX_CM_PER_EMIF_CLKCTRL_OFFSET 0x0720 #endif