From patchwork Sun Oct 10 07:05:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kewei Xu X-Patchwork-Id: 12548293 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B162EC433F5 for ; Sun, 10 Oct 2021 07:08:04 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7917560F46 for ; Sun, 10 Oct 2021 07:08:04 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 7917560F46 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=vYsLKrYxFfCJJBQI89VmjI8srm0PHTvR6i+a5KRzm6Q=; b=mMgMnmN0Qoedc4 t/9MDVAXlexZn22DLcRRUD5icO8p7LZbWKCpA8ejZQL++Ev27Ja7r0/+71ZZEH8ekeNxZw1RexCjC fStsUZC2wtXd5QGKRFIZ8E50omU/Lo69E48qJISP2FDJ89kKia3rbvhvNBmBQKX9VvyrFS6cQJ3NF QRt+7yFRfAkdArjRQFqWAfz5cW/r56lRmeR4uFhKjlzTJADBU14+WZ0/NukZGlpnhH12tCtpnvryg HWOwXhW8FtOuC7qu9IJfQonBnlzJqNRsIW0oCPV2TcYn4P7l0wsm26HdA2EntTHNVUK/87B3c9D4Z TrxivgwdvAABZUWI+x8A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mZSuT-006Q9u-2M; Sun, 10 Oct 2021 07:06:13 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mZStl-006Q0W-Ar; Sun, 10 Oct 2021 07:05:30 +0000 X-UUID: 74691142c8c94d2487e543f26df6a59c-20211010 X-UUID: 74691142c8c94d2487e543f26df6a59c-20211010 Received: from mtkcas68.mediatek.inc [(172.29.94.19)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1457348060; Sun, 10 Oct 2021 00:05:23 -0700 Received: from mtkmbs10n1.mediatek.inc (172.21.101.34) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sun, 10 Oct 2021 00:05:22 -0700 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Sun, 10 Oct 2021 15:05:20 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sun, 10 Oct 2021 15:05:19 +0800 From: Kewei Xu To: CC: , , , , , , , , , , , , , , Subject: [PATCH v8 5/5] i2c: mediatek: modify bus speed calculation formula Date: Sun, 10 Oct 2021 15:05:16 +0800 Message-ID: <20211010070516.26763-6-kewei.xu@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211010070516.26763-1-kewei.xu@mediatek.com> References: <20211010070516.26763-1-kewei.xu@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211010_000529_410798_D4A8437A X-CRM114-Status: GOOD ( 14.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org When clock-div is 0 or greater than 1, the bus speed calculated by the old speed calculation formula will be larger than the target speed. So we update the formula. Signed-off-by: Kewei Xu Reviewed-by: Qii Wang --- drivers/i2c/busses/i2c-mt65xx.c | 35 +++++++++++++++++++++++---------- 1 file changed, 25 insertions(+), 10 deletions(-) diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c index 3db4ed3f9050..ad07647f88d5 100644 --- a/drivers/i2c/busses/i2c-mt65xx.c +++ b/drivers/i2c/busses/i2c-mt65xx.c @@ -68,11 +68,12 @@ #define I2C_DEFAULT_CLK_DIV 5 #define MAX_SAMPLE_CNT_DIV 8 #define MAX_STEP_CNT_DIV 64 -#define MAX_CLOCK_DIV 256 +#define MAX_CLOCK_DIV_8BITS 256 +#define MAX_CLOCK_DIV_5BITS 32 #define MAX_HS_STEP_CNT_DIV 8 -#define I2C_STANDARD_MODE_BUFFER (1000 / 2) -#define I2C_FAST_MODE_BUFFER (300 / 2) -#define I2C_FAST_MODE_PLUS_BUFFER (20 / 2) +#define I2C_STANDARD_MODE_BUFFER (1000 / 3) +#define I2C_FAST_MODE_BUFFER (300 / 3) +#define I2C_FAST_MODE_PLUS_BUFFER (20 / 3) #define I2C_CONTROL_RS (0x1 << 1) #define I2C_CONTROL_DMA_EN (0x1 << 2) @@ -724,14 +725,26 @@ static int mtk_i2c_calculate_speed(struct mtk_i2c *i2c, unsigned int clk_src, unsigned int best_mul; unsigned int cnt_mul; int ret = -EINVAL; + int clock_div_constraint = 0; if (target_speed > I2C_MAX_HIGH_SPEED_MODE_FREQ) target_speed = I2C_MAX_HIGH_SPEED_MODE_FREQ; + if (i2c->use_default_timing) { + clock_div_constraint = 0; + } else if (i2c->dev_comp->ltiming_adjust && + i2c->ac_timing.inter_clk_div > 1) { + clock_div_constraint = 1; + } else if (i2c->dev_comp->ltiming_adjust && + i2c->ac_timing.inter_clk_div == 0) { + clock_div_constraint = -1; + } + max_step_cnt = mtk_i2c_max_step_cnt(target_speed); base_step_cnt = max_step_cnt; /* Find the best combination */ - opt_div = DIV_ROUND_UP(clk_src >> 1, target_speed); + opt_div = DIV_ROUND_UP(clk_src >> 1, target_speed) + + clock_div_constraint; best_mul = MAX_SAMPLE_CNT_DIV * max_step_cnt; /* Search for the best pair (sample_cnt, step_cnt) with @@ -766,7 +779,8 @@ static int mtk_i2c_calculate_speed(struct mtk_i2c *i2c, unsigned int clk_src, sample_cnt = base_sample_cnt; step_cnt = base_step_cnt; - if ((clk_src / (2 * sample_cnt * step_cnt)) > target_speed) { + if ((clk_src / (2 * (sample_cnt * step_cnt - clock_div_constraint))) > + target_speed) { /* In this case, hardware can't support such * low i2c_bus_freq */ @@ -853,13 +867,16 @@ static int mtk_i2c_set_speed_adjust_timing(struct mtk_i2c *i2c, target_speed = i2c->speed_hz; parent_clk /= i2c->clk_src_div; - if (i2c->dev_comp->timing_adjust) - max_clk_div = MAX_CLOCK_DIV; + if (i2c->dev_comp->timing_adjust && i2c->dev_comp->ltiming_adjust) + max_clk_div = MAX_CLOCK_DIV_5BITS; + else if (i2c->dev_comp->timing_adjust) + max_clk_div = MAX_CLOCK_DIV_8BITS; else max_clk_div = 1; for (clk_div = 1; clk_div <= max_clk_div; clk_div++) { clk_src = parent_clk / clk_div; + i2c->ac_timing.inter_clk_div = clk_div - 1; if (target_speed > I2C_MAX_FAST_MODE_PLUS_FREQ) { /* Set master code speed register */ @@ -906,8 +923,6 @@ static int mtk_i2c_set_speed_adjust_timing(struct mtk_i2c *i2c, break; } - i2c->ac_timing.inter_clk_div = clk_div - 1; - return 0; }