@@ -395,8 +395,8 @@ i2c0: i2c@2180000 {
reg = <0x0 0x2180000 0x0 0x10000>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 1>;
- dma-names = "tx", "rx";
- dmas = <&edma0 1 39>, <&edma0 1 38>;
+ dma-names = "rx", "tx";
+ dmas = <&edma0 1 38>, <&edma0 1 39>;
status = "disabled";
};
@@ -407,8 +407,8 @@ i2c1: i2c@2190000 {
reg = <0x0 0x2190000 0x0 0x10000>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 1>;
- dma-names = "tx", "rx";
- dmas = <&edma0 1 37>, <&edma0 1 36>;
+ dma-names = "rx", "tx";
+ dmas = <&edma0 1 36>, <&edma0 1 37>;
status = "disabled";
};
@@ -419,8 +419,8 @@ i2c2: i2c@21a0000 {
reg = <0x0 0x21a0000 0x0 0x10000>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 1>;
- dma-names = "tx", "rx";
- dmas = <&edma0 1 35>, <&edma0 1 34>;
+ dma-names = "rx", "tx";
+ dmas = <&edma0 1 34>, <&edma0 1 35>;
status = "disabled";
};
Although the ordering of DMA channels was not relevant in the txt binding, it is defined as ordered in the converted yaml schema. Update the dts to match the order. Signed-off-by: Li Yang <leoyang.li@nxp.com> --- arch/arm/boot/dts/ls1021a.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)