From patchwork Mon Oct 25 03:10:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 12580627 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12630C433F5 for ; Mon, 25 Oct 2021 03:12:46 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D3AB760E0B for ; Mon, 25 Oct 2021 03:12:45 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org D3AB760E0B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=toshiba.co.jp Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=NXyXPPLcSufblUiCUDMePKfyV4QNw4ol3mAu7DBvnXQ=; b=0w5HUb4kz1Uabe 6AduFBWK8MHmOAoKcPcvi4HGPSDH7cjltkYN7blmGjvI4x8omLrslGmw705rgK6587q+9Aed91DPe 1OdmEpi/IpO7O1BbR5DM9bK3YS3hKcvYisinG1nj5BH5YNyvwhdBUgbfqYuKKiXyK69BV5lkskE57 8pXVPuagbNBKThdTPv9UQRACFsoZATP623zqmZirkoMJjpUDaTA5EdAQ05fK08Odx7Pgcm0YLs8qT La8uGRABEkYecMkfoQ3evx0oqWL6KZPcTFhgB5E6yexzKH3hGcYRhNexI7kw333xc7UqPZOWLvZB3 ddI0F0tsch96/8FeTuTw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1meqOZ-00F56L-5J; Mon, 25 Oct 2021 03:11:31 +0000 Received: from mo-csw1115.securemx.jp ([210.130.202.157] helo=mo-csw.securemx.jp) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1meqO0-00F4w7-Do for linux-arm-kernel@lists.infradead.org; Mon, 25 Oct 2021 03:10:58 +0000 Received: by mo-csw.securemx.jp (mx-mo-csw1115) id 19P3Ak3W014990; Mon, 25 Oct 2021 12:10:46 +0900 X-Iguazu-Qid: 2wGrDIThyzSYy5fl18 X-Iguazu-QSIG: v=2; s=0; t=1635131446; q=2wGrDIThyzSYy5fl18; m=LAhFUcExfCUisuJKhnlwuS2rtYHwTY1M8NfTLcfJCXA= Received: from imx2-a.toshiba.co.jp (imx2-a.toshiba.co.jp [106.186.93.35]) by relay.securemx.jp (mx-mr1113) id 19P3Ahrf037122 (version=TLSv1.2 cipher=AES128-GCM-SHA256 bits=128 verify=NOT); Mon, 25 Oct 2021 12:10:45 +0900 Received: from enc01.toshiba.co.jp (enc01.toshiba.co.jp [106.186.93.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by imx2-a.toshiba.co.jp (Postfix) with ESMTPS id AB9C5100098; Mon, 25 Oct 2021 12:10:43 +0900 (JST) Received: from hop001.toshiba.co.jp ([133.199.164.63]) by enc01.toshiba.co.jp with ESMTP id 19P3AhLB004082; Mon, 25 Oct 2021 12:10:43 +0900 From: Nobuhiro Iwamatsu To: Michael Turquette , Stephen Boyd , Rob Herring Cc: punit1.agrawal@toshiba.co.jp, yuji2.ishikawa@toshiba.co.jp, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Nobuhiro Iwamatsu , Rob Herring Subject: [PATCH v5 1/4] dt-bindings: clock: Add DT bindings for PLL of Toshiba Visconti TMPV770x SoC Date: Mon, 25 Oct 2021 12:10:35 +0900 X-TSB-HOP: ON Message-Id: <20211025031038.4180686-2-nobuhiro1.iwamatsu@toshiba.co.jp> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211025031038.4180686-1-nobuhiro1.iwamatsu@toshiba.co.jp> References: <20211025031038.4180686-1-nobuhiro1.iwamatsu@toshiba.co.jp> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211024_201056_786653_028DA0BA X-CRM114-Status: GOOD ( 14.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add device tree bindings for PLL of Toshiba Visconti TMPV770x SoC series. Signed-off-by: Nobuhiro Iwamatsu Reviewed-by: Rob Herring --- v4 -> v5: - Add Reviewed-by: Rob Herring . v3 -> v4: - Fix node name to clock-controller. - Remove osc2-clk-frequency, and this defines to DT as fixed-clock. - Add clocks. v2 -> v3: - Change file name. v1 -> v2: - Update subject. .../clock/toshiba,tmpv770x-pipllct.yaml | 57 +++++++++++++++++++ 1 file changed, 57 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pipllct.yaml diff --git a/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pipllct.yaml b/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pipllct.yaml new file mode 100644 index 000000000000..7b7300ce96d6 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pipllct.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/toshiba,tmpv770x-pipllct.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Toshiba Visconti5 TMPV770X PLL Controller Device Tree Bindings + +maintainers: + - Nobuhiro Iwamatsu + +description: + Toshia Visconti5 PLL controller which supports the PLLs on TMPV770X. + +properties: + compatible: + const: toshiba,tmpv7708-pipllct + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + + clocks: + description: External reference clock (OSC2) + maxItems: 1 + +required: + - compatible + - reg + - "#clock-cells" + - clocks + +additionalProperties: false + +examples: + - | + + osc2_clk: osc2-clk { + compatible = "fixed-clock"; + clock-frequency = <20000000>; + #clock-cells = <0>; + }; + + soc { + #address-cells = <2>; + #size-cells = <2>; + + pipllct: clock-controller@24220000 { + compatible = "toshiba,tmpv7708-pipllct"; + reg = <0 0x24220000 0 0x820>; + #clock-cells = <1>; + clocks = <&osc2_clk>; + }; + }; +...