Message ID | 20211027201641.2076427-3-robh@kernel.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Another version of arm64 userspace counter access support. | expand |
On Wed, Oct 27 2021 at 15:16, Rob Herring wrote: > For controlling user space counter access, we need to know if any event > in a context (currently scheduled or not) is using user space counters. Who is 'we'? Come on. How is someone without context supposed to figure out that 'we' means ARM64 when staring at that changelog a year later? Is it really that hard to write coherent changelogs which make sense on their own and actually follow Documentation/process/ which exists for a reason? Thanks, tglx
On Tue, Nov 30, 2021 at 4:57 PM Thomas Gleixner <tglx@linutronix.de> wrote: > > On Wed, Oct 27 2021 at 15:16, Rob Herring wrote: > > For controlling user space counter access, we need to know if any event > > in a context (currently scheduled or not) is using user space counters. > > Who is 'we'? > > Come on. How is someone without context supposed to figure out that 'we' > means ARM64 when staring at that changelog a year later? > > Is it really that hard to write coherent changelogs which make sense on > their own and actually follow Documentation/process/ which exists for a > reason? I've rewritten it like this: On arm64, user space counter access will be controlled differently compared to x86. On x86, access in the strictest mode is enabled for all tasks in an MM when any event is mmap'ed. For arm64, access is explicitly requested for an event and only enabled when the event's context is active. This avoids hooks into the arch context switch code and gives better control of when access is enabled. In order to configure user space access when the PMU is enabled, it is necessary to know if any event (currently active or not) in the current context has user space accessed enabled. Add a counter similar to other counters in the context to avoid walking the event list every time.
On Fri, Dec 03 2021 at 09:58, Rob Herring wrote: > On Tue, Nov 30, 2021 at 4:57 PM Thomas Gleixner <tglx@linutronix.de> wrote: > I've rewritten it like this: > > On arm64, user space counter access will be controlled differently > compared to x86. On x86, access in the strictest mode is enabled for all > tasks in an MM when any event is mmap'ed. For arm64, access is > explicitly requested for an event and only enabled when the event's > context is active. This avoids hooks into the arch context switch code > and gives better control of when access is enabled. > > In order to configure user space access when the PMU is enabled, it is > necessary to know if any event (currently active or not) in the current > context has user space accessed enabled. Add a counter similar to other > counters in the context to avoid walking the event list every time. Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index 34ebcc9af608..d733cac749e2 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h @@ -828,6 +828,7 @@ struct perf_event_context { int nr_events; int nr_active; + int nr_user; int is_active; int nr_stat; int nr_freq; diff --git a/kernel/events/core.c b/kernel/events/core.c index 744e8726c5b2..01290d150da3 100644 --- a/kernel/events/core.c +++ b/kernel/events/core.c @@ -1808,6 +1808,8 @@ list_add_event(struct perf_event *event, struct perf_event_context *ctx) list_add_rcu(&event->event_entry, &ctx->event_list); ctx->nr_events++; + if (event->hw.flags & PERF_EVENT_FLAG_USER_READ_CNT) + ctx->nr_user++; if (event->attr.inherit_stat) ctx->nr_stat++; @@ -1999,6 +2001,8 @@ list_del_event(struct perf_event *event, struct perf_event_context *ctx) event->attach_state &= ~PERF_ATTACH_CONTEXT; ctx->nr_events--; + if (event->hw.flags & PERF_EVENT_FLAG_USER_READ_CNT) + ctx->nr_user--; if (event->attr.inherit_stat) ctx->nr_stat--;