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Sun, 31 Oct 2021 07:42:46 -0700 (PDT) Received: from localhost ([134.195.101.46]) by smtp.gmail.com with ESMTPSA id w13sm4088839pgm.3.2021.10.31.07.42.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 31 Oct 2021 07:42:45 -0700 (PDT) From: Leo Yan To: Mathieu Poirier , Suzuki K Poulose , Mike Leach , Alexander Shishkin , James Clark , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Leo Yan Subject: [PATCH v1 4/4] coresight: etm3x: Don't trace contextID for non-root namespace in perf mode Date: Sun, 31 Oct 2021 22:42:14 +0800 Message-Id: <20211031144214.237879-5-leo.yan@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211031144214.237879-1-leo.yan@linaro.org> References: <20211031144214.237879-1-leo.yan@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211031_074247_118933_F3A8F9D3 X-CRM114-Status: GOOD ( 12.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org ETMv3 driver doesn't handle the case when programs run in non-root PID namespace, so it allows the contextID tracing by directly using perf config. This patch changes to only enable contextID tracing for root PID namespace. Note, the hardware supports VMID tracing from ETMv3.5, but the driver never enables VMID trace, so this patch doesn't handle VMID trace (bit 30 in ETMCR register) particularly. Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/coresight-etm3x-core.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/hwtracing/coresight/coresight-etm3x-core.c b/drivers/hwtracing/coresight/coresight-etm3x-core.c index cf64ce73a741..0621ab0c71d9 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm3x-core.c @@ -340,6 +340,10 @@ static int etm_parse_event_config(struct etm_drvdata *drvdata, config->ctrl = attr->config; + /* Don't trace contextID when runs in non-root PID namespace */ + if (task_active_pid_ns(current) != &init_pid_ns) + config->ctrl &= ~ETMCR_CTXID_SIZE; + /* * Possible to have cores with PTM (supports ret stack) and ETM * (never has ret stack) on the same SoC. So if we have a request