| Message ID | 20211102094651.2071532-2-oupton@google.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | KVM: arm64: Emulate the OS lock | expand |
On Tue, Nov 2, 2021 at 2:47 AM Oliver Upton <oupton@google.com> wrote: > > Any valid implementation of the architecture should generate an > undefined exception for writes to a read-only register, such as > OSLSR_EL1. Nonetheless, the KVM handler actually implements write-ignore > behavior. > > Align the trap handler for OSLSR_EL1 with hardware behavior. If such a > write ever traps to EL2, inject an undef into the guest and print a > warning. > > Signed-off-by: Oliver Upton <oupton@google.com> Reviewed-by: Reiji Watanabe <reijiw@google.com> Thanks, Reiji
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 1d46e185f31e..17fa6ddf5405 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -292,7 +292,7 @@ static bool trap_oslsr_el1(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) { if (p->is_write) { - return ignore_write(vcpu, p); + return write_to_read_only(vcpu, p, r); } else { p->regval = (1 << 3); return true;
Any valid implementation of the architecture should generate an undefined exception for writes to a read-only register, such as OSLSR_EL1. Nonetheless, the KVM handler actually implements write-ignore behavior. Align the trap handler for OSLSR_EL1 with hardware behavior. If such a write ever traps to EL2, inject an undef into the guest and print a warning. Signed-off-by: Oliver Upton <oupton@google.com> --- arch/arm64/kvm/sys_regs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)