From patchwork Fri Nov 12 22:34:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Li X-Patchwork-Id: 12692446 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1BEEFC433EF for ; Fri, 12 Nov 2021 22:36:43 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E339060ED5 for ; Fri, 12 Nov 2021 22:36:42 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org E339060ED5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=6uwG2GjMByBraG04HP6GgtmZqe2ozvLic0l+an3Lw+U=; b=Wi5iIsDDlLkqjo bCydZIYIBkKxdIYQcask5CEkTTp6Gr/TRDT+5C/2w9D3z0fSgT7NP96I1gA+Ag+aiPo28mtHWa8mv R+zEkTQY8LFYdhYfeWPunQh+ckK052mYexciNyT2XPJ5zZhFSiIMOY2sXF1E8eBKtd2hR+DIrNHud zPXKN6vDQQvqKH0YdrbmJttrirvW3sl+ljrkhzXdjTuMZz0P1GEidJ6rZ+URATCnAovWOVMhUUUYS 7LfZOS2pcFxwt7M6EjMH8UZoXJXG0PPyDDzzk+0TDN+5ZHKrFFDPTRgF06Ayd4uMoBBr1xJZYl8Ub t5KfCX7AxvPaQ+bfw+gA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mlf8Z-00Bihw-6t; Fri, 12 Nov 2021 22:35:11 +0000 Received: from inva020.nxp.com ([92.121.34.13]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mlf8V-00BifZ-Cv for linux-arm-kernel@lists.infradead.org; Fri, 12 Nov 2021 22:35:08 +0000 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 64FD21A032A; Fri, 12 Nov 2021 23:35:03 +0100 (CET) Received: from smtp.na-rdc02.nxp.com (usphx01srsp001v.us-phx01.nxp.com [134.27.49.11]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 27BCE1A207F; Fri, 12 Nov 2021 23:35:03 +0100 (CET) Received: from right.am.freescale.net (right.am.freescale.net [10.81.116.142]) by usphx01srsp001v.us-phx01.nxp.com (Postfix) with ESMTP id 4E0D540BF1; Fri, 12 Nov 2021 15:35:02 -0700 (MST) From: Li Yang To: Bjorn Helgaas , Rob Herring , Shawn Guo Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Li Yang Subject: [PATCH 02/11] dt-bindings: pci: layerscape-pci: define aer/pme interrupts Date: Fri, 12 Nov 2021 16:34:48 -0600 Message-Id: <20211112223457.10599-3-leoyang.li@nxp.com> X-Mailer: git-send-email 2.25.1.377.g2d2118b In-Reply-To: <20211112223457.10599-1-leoyang.li@nxp.com> References: <20211112223457.10599-1-leoyang.li@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211112_143507_600480_9CFA1E7B X-CRM114-Status: GOOD ( 11.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Some platforms using this controller have separated interrupt lines for aer or pme events instead of having a single interrupt line for miscellaneous events. Define interrupts in the binding for these interrupt lines. Signed-off-by: Li Yang --- .../devicetree/bindings/pci/layerscape-pci.txt | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt index 0d3d78aebe26..5697fe078072 100644 --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt @@ -31,8 +31,13 @@ Required properties: - reg: base addresses and lengths of the PCIe controller register blocks. - interrupts: A list of interrupt outputs of the controller. Must contain an entry for each entry in the interrupt-names property. -- interrupt-names: Must include the following entries: - "intr": The interrupt that is asserted for controller interrupts +- interrupt-names: It could include the following entries: + "aer": For interrupt line reporting aer events when non MSI/MSI-X/INTx mode + is used + "pme": For interrupt line reporting pme events when non MSI/MSI-X/INTx mode + is used + "intr": For interrupt line reporting miscellaneous controller events + ...... - fsl,pcie-scfg: Must include two entries. The first entry must be a link to the SCFG device node The second entry must be '0' or '1' based on physical PCIe controller index. @@ -48,8 +53,9 @@ Example: reg = <0x00 0x03400000 0x0 0x00010000 /* controller registers */ 0x40 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; - interrupts = ; /* controller interrupt */ - interrupt-names = "intr"; + interrupts = , /* aer interrupt */ + ; /* pme interrupt */ + interrupt-names = "aer", "pme"; fsl,pcie-scfg = <&scfg 0>; #address-cells = <3>; #size-cells = <2>;