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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id b6sm2232846wmq.45.2021.11.16.03.52.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Nov 2021 03:52:14 -0800 (PST) From: Jean-Philippe Brucker To: robh+dt@kernel.org Cc: iommu@lists.linux-foundation.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, will@kernel.org, robin.murphy@arm.com, joro@8bytes.org, mark.rutland@arm.com, jkchen@linux.alibaba.com, leo.yan@linaro.org, uchida.jun@socionext.com, Jean-Philippe Brucker Subject: [PATCH 2/2] perf/smmuv3: Add devicetree support Date: Tue, 16 Nov 2021 11:35:37 +0000 Message-Id: <20211116113536.69758-3-jean-philippe@linaro.org> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211116113536.69758-1-jean-philippe@linaro.org> References: <20211116113536.69758-1-jean-philippe@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211116_035217_329112_38F053F4 X-CRM114-Status: GOOD ( 18.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add device-tree support to the SMMUv3 PMCG. One small cosmetic change while factoring the option mask printout: don't display it when zero, it only contains one erratum at the moment. Signed-off-by: Jay Chen Signed-off-by: Jean-Philippe Brucker --- drivers/perf/arm_smmuv3_pmu.c | 25 +++++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-) diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c index 226348822ab3..958325ac103a 100644 --- a/drivers/perf/arm_smmuv3_pmu.c +++ b/drivers/perf/arm_smmuv3_pmu.c @@ -47,6 +47,7 @@ #include #include #include +#include #include #include #include @@ -750,8 +751,15 @@ static void smmu_pmu_get_acpi_options(struct smmu_pmu *smmu_pmu) smmu_pmu->options |= SMMU_PMCG_EVCNTR_RDONLY; break; } +} + +static void smmu_pmu_get_of_options(struct smmu_pmu *smmu_pmu) +{ + struct device_node *node = smmu_pmu->dev->of_node; - dev_notice(smmu_pmu->dev, "option mask 0x%x\n", smmu_pmu->options); + if (of_device_is_compatible(node, "hisilicon,smmu-v3-pmcg-hip08")) + /* HiSilicon Erratum 162001800 */ + smmu_pmu->options |= SMMU_PMCG_EVCNTR_RDONLY; } static int smmu_pmu_probe(struct platform_device *pdev) @@ -834,7 +842,13 @@ static int smmu_pmu_probe(struct platform_device *pdev) return -EINVAL; } - smmu_pmu_get_acpi_options(smmu_pmu); + if (dev->of_node) + smmu_pmu_get_of_options(smmu_pmu); + else + smmu_pmu_get_acpi_options(smmu_pmu); + + if (smmu_pmu->options) + dev_notice(dev, "option mask 0x%x\n", smmu_pmu->options); /* Pick one CPU to be the preferred one to use */ smmu_pmu->on_cpu = raw_smp_processor_id(); @@ -884,10 +898,17 @@ static void smmu_pmu_shutdown(struct platform_device *pdev) smmu_pmu_disable(&smmu_pmu->pmu); } +static const struct of_device_id arm_smmu_pmu_match[] = { + { .compatible = "arm,smmu-v3-pmcg" }, + {}, +}; +MODULE_DEVICE_TABLE(of, arm_smmu_pmu_match); + static struct platform_driver smmu_pmu_driver = { .driver = { .name = "arm-smmu-v3-pmcg", .suppress_bind_attrs = true, + .of_match_table = of_match_ptr(arm_smmu_pmu_match), }, .probe = smmu_pmu_probe, .remove = smmu_pmu_remove,