Message ID | 20211117094701.11974-1-robert.marko@sartura.hr (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | arm64: dts: allwinner: orangepi-zero-plus: fix PHY mode | expand |
On 11/17/21 3:47 AM, Robert Marko wrote: > Orange Pi Zero Plus uses a Realtek RTL8211E RGMII Gigabit PHY, but its > currently set to plain RGMII mode meaning that it doesn't introduce > delays. > > With this setup, TX packets are completely lost and changing the mode to > RGMII-ID so the PHY will add delays internally fixes the issue. > > Tested-by: Ron Goossens <rgoossens@gmail.com> > Signed-off-by: Robert Marko <robert.marko@sartura.hr> Tested-by: Samuel Holland <samuel@sholland.org> Also please add: Fixes: a7affb13b271 ("arm64: allwinner: H5: Add Xunlong Orange Pi Zero Plus") so this will get backported to stable releases. Regards, Samuel > --- > arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts > index d13980ed7a79..7ec5ac850a0d 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts > @@ -69,7 +69,7 @@ &emac { > pinctrl-0 = <&emac_rgmii_pins>; > phy-supply = <®_gmac_3v3>; > phy-handle = <&ext_rgmii_phy>; > - phy-mode = "rgmii"; > + phy-mode = "rgmii-id"; > status = "okay"; > }; > >
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts index d13980ed7a79..7ec5ac850a0d 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts @@ -69,7 +69,7 @@ &emac { pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <®_gmac_3v3>; phy-handle = <&ext_rgmii_phy>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; status = "okay"; };