Message ID | 20211117140222.43692-1-robert.marko@sartura.hr (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v2] arm64: dts: allwinner: orangepi-zero-plus: fix PHY mode | expand |
On Wed, Nov 17, 2021 at 10:02 PM Robert Marko <robert.marko@sartura.hr> wrote: > > Orange Pi Zero Plus uses a Realtek RTL8211E RGMII Gigabit PHY, but its > currently set to plain RGMII mode meaning that it doesn't introduce > delays. > > With this setup, TX packets are completely lost and changing the mode to > RGMII-ID so the PHY will add delays internally fixes the issue. > > Fixes: a7affb13b271 ("arm64: allwinner: H5: Add Xunlong Orange Pi Zero Plus") > > Tested-by: Ron Goossens <rgoossens@gmail.com> > Signed-off-by: Robert Marko <robert.marko@sartura.hr> > Tested-by: Samuel Holland <samuel@sholland.org> Acked-by: Chen-Yu Tsai <wens@csie.org>
On Wed, 17 Nov 2021 15:02:22 +0100, Robert Marko wrote: > Orange Pi Zero Plus uses a Realtek RTL8211E RGMII Gigabit PHY, but its > currently set to plain RGMII mode meaning that it doesn't introduce > delays. > > With this setup, TX packets are completely lost and changing the mode to > RGMII-ID so the PHY will add delays internally fixes the issue. > > [...] Applied to local tree (sunxi/fixes-for-5.16). Thanks! Maxime
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts index d13980ed7a79..7ec5ac850a0d 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts @@ -69,7 +69,7 @@ &emac { pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <®_gmac_3v3>; phy-handle = <&ext_rgmii_phy>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; status = "okay"; };