From patchwork Wed Nov 17 15:38:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandru Elisei X-Patchwork-Id: 12692954 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60A01C433F5 for ; Wed, 17 Nov 2021 15:52:30 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2288361261 for ; Wed, 17 Nov 2021 15:52:30 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 2288361261 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=IS9WRmJLL3N+DhzEvpZ7zhicD2w73gt7G+UKZff4TzQ=; b=JQyDeUvD2D+WYs JK2Q2fhProTLOF+Ji0SAmk3AH6VhKDlJEwkaMCb5A4CpUaXNnSTfHXBEAM3eWZ695oijv8JtG7C9N hX7HUylfiPK52M1znaAD3reA8MPHa4vFybt0S62/p9LcPzJc29HUZnUADsj9l1a+FRp5i0QTzc0ea +DONz1knjDHCAYy8e1vd4jocSeVfY8lcko8Tp/brcqb53Hs6MDes8ZN1IV8zF0rDAaIqht06LTWoU MQl1TOM5u8U0ZhKwuadSro+ISfXO3WZj6Vp7AkHO2l1QG53JQ6kn4dQSM00QcHDg55CJkEGFwTryS pFreLQXWuwWTfFerDtXA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mnNCz-005WJM-4q; Wed, 17 Nov 2021 15:50:49 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mnN0H-005Q9G-2V for linux-arm-kernel@lists.infradead.org; Wed, 17 Nov 2021 15:37:42 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7FBD41FB; Wed, 17 Nov 2021 07:37:40 -0800 (PST) Received: from monolith.localdoman (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C22AB3F5A1; Wed, 17 Nov 2021 07:37:38 -0800 (PST) From: Alexandru Elisei To: maz@kernel.org, james.morse@arm.com, suzuki.poulose@arm.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, will@kernel.org, mark.rutland@arm.com Cc: Sudeep Holla Subject: [RFC PATCH v5 22/38] KVM: arm64: Add SPE VCPU device attribute to initialize SPE Date: Wed, 17 Nov 2021 15:38:26 +0000 Message-Id: <20211117153842.302159-23-alexandru.elisei@arm.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211117153842.302159-1-alexandru.elisei@arm.com> References: <20211117153842.302159-1-alexandru.elisei@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211117_073741_271199_CBA414B9 X-CRM114-Status: GOOD ( 15.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Sudeep Holla Add KVM_ARM_VCPU_SPE_CTRL(KVM_ARM_VCPU_SPE_INIT) VCPU ioctl to initialize SPE. Initialization can only be done once for a VCPU. If the feature bit is set, then SPE must be initialized before the VCPU can be run. [ Alexandru E: Split from "KVM: arm64: Add a new VCPU device control group for SPE" ] Signed-off-by: Sudeep Holla Signed-off-by: Alexandru Elisei --- Documentation/virt/kvm/devices/vcpu.rst | 16 ++++++++++++++++ arch/arm64/include/asm/kvm_spe.h | 6 ++++++ arch/arm64/include/uapi/asm/kvm.h | 1 + arch/arm64/kvm/arm.c | 4 ++++ arch/arm64/kvm/spe.c | 24 ++++++++++++++++++++++++ 5 files changed, 51 insertions(+) diff --git a/Documentation/virt/kvm/devices/vcpu.rst b/Documentation/virt/kvm/devices/vcpu.rst index a27b149c3b8b..0ed852315664 100644 --- a/Documentation/virt/kvm/devices/vcpu.rst +++ b/Documentation/virt/kvm/devices/vcpu.rst @@ -255,3 +255,19 @@ Returns: Specifies the Profiling Buffer management interrupt number. The interrupt number must be a PPI and the interrupt number must be the same for each VCPU. SPE emulation requires an in-kernel vGIC implementation. + +5.2 ATTRIBUTE: KVM_ARM_VCPU_SPE_INIT +----------------------------------- + +:Parameters: no additional parameter in kvm_device_attr.addr + +Returns: + + ======= ============================================ + -EBUSY SPE already initialized for this VCPU + -ENXIO SPE not supported or not properly configured + ======= ============================================ + +Request initialization of the Statistical Profiling Extension for this VCPU. +Must be done after initializaing the in-kernel irqchip and after setting the +Profiling Buffer management interrupt number for the VCPU. diff --git a/arch/arm64/include/asm/kvm_spe.h b/arch/arm64/include/asm/kvm_spe.h index a5484953d06f..14df2c830fda 100644 --- a/arch/arm64/include/asm/kvm_spe.h +++ b/arch/arm64/include/asm/kvm_spe.h @@ -22,6 +22,7 @@ struct kvm_vcpu_spe { }; int kvm_spe_vcpu_enable_spe(struct kvm_vcpu *vcpu); +int kvm_spe_vcpu_first_run_init(struct kvm_vcpu *vcpu); int kvm_spe_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); int kvm_spe_get_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); @@ -37,6 +38,11 @@ static inline int kvm_spe_vcpu_enable_spe(struct kvm_vcpu *vcpu) return 0; } +static inline int kvm_spe_vcpu_first_run_init(struct kvm_vcpu *vcpu) +{ + return 0; +} + static inline int kvm_spe_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr) { diff --git a/arch/arm64/include/uapi/asm/kvm.h b/arch/arm64/include/uapi/asm/kvm.h index c55d94a1a8f5..d4c0b53a5fb2 100644 --- a/arch/arm64/include/uapi/asm/kvm.h +++ b/arch/arm64/include/uapi/asm/kvm.h @@ -370,6 +370,7 @@ struct kvm_arm_copy_mte_tags { #define KVM_ARM_VCPU_PVTIME_IPA 0 #define KVM_ARM_VCPU_SPE_CTRL 3 #define KVM_ARM_VCPU_SPE_IRQ 0 +#define KVM_ARM_VCPU_SPE_INIT 1 /* KVM_IRQ_LINE irq field index values */ #define KVM_ARM_IRQ_VCPU2_SHIFT 28 diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c index 8a7c01d1df58..5270f3b9886c 100644 --- a/arch/arm64/kvm/arm.c +++ b/arch/arm64/kvm/arm.c @@ -652,6 +652,10 @@ static int kvm_vcpu_first_run_init(struct kvm_vcpu *vcpu) return ret; ret = kvm_arm_pmu_v3_enable(vcpu); + if (ret) + return ret; + + ret = kvm_spe_vcpu_first_run_init(vcpu); /* * Initialize traps for protected VMs. diff --git a/arch/arm64/kvm/spe.c b/arch/arm64/kvm/spe.c index 7520d7925460..a3d5bcd1a96b 100644 --- a/arch/arm64/kvm/spe.c +++ b/arch/arm64/kvm/spe.c @@ -45,6 +45,17 @@ int kvm_spe_vcpu_enable_spe(struct kvm_vcpu *vcpu) return 0; } +int kvm_spe_vcpu_first_run_init(struct kvm_vcpu *vcpu) +{ + if (!kvm_vcpu_has_spe(vcpu)) + return 0; + + if (!vcpu->arch.spe.initialized) + return -EINVAL; + + return 0; +} + static bool kvm_vcpu_supports_spe(struct kvm_vcpu *vcpu) { if (!kvm_supports_spe()) @@ -104,6 +115,18 @@ int kvm_spe_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr) vcpu->arch.spe.irq_num = irq; return 0; } + case KVM_ARM_VCPU_SPE_INIT: + if (!vcpu->arch.spe.irq_num) + return -ENXIO; + + if (!vgic_initialized(vcpu->kvm)) + return -ENXIO; + + if (kvm_vgic_set_owner(vcpu, vcpu->arch.spe.irq_num, &vcpu->arch.spe)) + return -ENXIO; + + vcpu->arch.spe.initialized = true; + return 0; } return -ENXIO; @@ -140,6 +163,7 @@ int kvm_spe_has_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr) switch(attr->attr) { case KVM_ARM_VCPU_SPE_IRQ: + case KVM_ARM_VCPU_SPE_INIT: return 0; }