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Wed, 17 Nov 2021 16:15:30 -0500 (EST) From: Sven Peter To: iommu@lists.linux-foundation.org, Robin Murphy Cc: Sven Peter , Joerg Roedel , Will Deacon , Rob Herring , Janne Grunau , Hector Martin , Alyssa Rosenzweig , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/4] iommu/io-pgtable: Add DART PTE support for t6000 Date: Wed, 17 Nov 2021 22:15:08 +0100 Message-Id: <20211117211509.28066-4-sven@svenpeter.dev> X-Mailer: git-send-email 2.30.1 (Apple Git-130) In-Reply-To: <20211117211509.28066-1-sven@svenpeter.dev> References: <20211117211509.28066-1-sven@svenpeter.dev> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211117_131532_907635_45F78E46 X-CRM114-Status: GOOD ( 13.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The DARTs present in the M1 Pro/Max SoC support a 42bit physical address space by shifting the paddr and extending its mask inside the PTE. Signed-off-by: Sven Peter --- drivers/iommu/io-pgtable-arm.c | 30 +++++++++++++++++++++++++++++- include/linux/io-pgtable.h | 2 ++ 2 files changed, 31 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c index a8c660b8b3e9..be66774aaf70 100644 --- a/drivers/iommu/io-pgtable-arm.c +++ b/drivers/iommu/io-pgtable-arm.c @@ -137,6 +137,11 @@ #define APPLE_DART_PTE_SUBPAGE_START GENMASK_ULL(63, 52) #define APPLE_DART_PTE_SUBPAGE_END GENMASK_ULL(51, 40) +#define APPLE_DART_PADDR_MASK_PS_36BIT GENMASK_ULL(35, 12) +#define APPLE_DART_PADDR_SHIFT_PS_36BIT (0) +#define APPLE_DART_PADDR_MASK_PS_42BIT GENMASK_ULL(37, 10) +#define APPLE_DART_PADDR_SHIFT_PS_42BIT (4) + /* IOPTE accessors */ #define iopte_deref(pte,d) __va(iopte_to_paddr(pte, d)) @@ -171,6 +176,13 @@ static arm_lpae_iopte paddr_to_iopte(phys_addr_t paddr, { arm_lpae_iopte pte = paddr; + if (data->iop.fmt == APPLE_DART) { + pte = paddr >> data->iop.cfg.apple_dart_cfg.paddr_shift; + pte &= data->iop.cfg.apple_dart_cfg.paddr_mask; + + return pte; + } + /* Of the bits which overlap, either 51:48 or 15:12 are always RES0 */ return (pte | (pte >> (48 - 12))) & ARM_LPAE_PTE_ADDR_MASK; } @@ -180,6 +192,12 @@ static phys_addr_t iopte_to_paddr(arm_lpae_iopte pte, { u64 paddr = pte & ARM_LPAE_PTE_ADDR_MASK; + if (data->iop.fmt == APPLE_DART) { + paddr = pte & data->iop.cfg.apple_dart_cfg.paddr_mask; + paddr <<= data->iop.cfg.apple_dart_cfg.paddr_shift; + return paddr; + } + if (ARM_LPAE_GRANULE(data) < SZ_64K) return paddr; @@ -1122,8 +1140,18 @@ apple_dart_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie) struct arm_lpae_io_pgtable *data; int i; - if (cfg->oas > 36) + switch (cfg->oas) { + case 36: + cfg->apple_dart_cfg.paddr_shift = APPLE_DART_PADDR_SHIFT_PS_36BIT; + cfg->apple_dart_cfg.paddr_mask = APPLE_DART_PADDR_MASK_PS_36BIT; + break; + case 42: + cfg->apple_dart_cfg.paddr_shift = APPLE_DART_PADDR_SHIFT_PS_42BIT; + cfg->apple_dart_cfg.paddr_mask = APPLE_DART_PADDR_MASK_PS_42BIT; + break; + default: return NULL; + } data = arm_lpae_alloc_pgtable(cfg); if (!data) diff --git a/include/linux/io-pgtable.h b/include/linux/io-pgtable.h index 86af6f0a00a2..4e26ebb0be93 100644 --- a/include/linux/io-pgtable.h +++ b/include/linux/io-pgtable.h @@ -136,6 +136,8 @@ struct io_pgtable_cfg { struct { u64 ttbr[4]; u32 n_ttbrs; + u32 paddr_shift; + u64 paddr_mask; } apple_dart_cfg; }; };