From patchwork Fri Nov 19 22:07:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jim Quinlan X-Patchwork-Id: 12693158 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D9BF0C433F5 for ; Fri, 19 Nov 2021 22:10:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=TXFOVpJ95o3nh1Erb4ojLzD2UzpgfnRbCu92wM47yuo=; b=OyJ30kEhfzT38H DlxoSfyqgMe7GzXHB5IfSDhsr8k25z7YpGRuiZHpim4ayP8hc3BFO9eNBj7ddNIr4PFyqh08yWTWO TA7YEaiztH1X9eZCClJiDLieRJhHfT/P7gpkVnFWSZ9PxSPINjXgBUjpZFYlbmpLcQYNCggxKXnQB lLnoTNcAB4scqYyjGyTx4280QIKNMxQGZaCzq4OQoHmz7NMWChtwfchUz2aoaO87pfY9uhH+LhSf3 nvyAS3TYDWLGBW2l7agMKB1111tBdJWiACRJZXz4JwnD5lgqFx6v8tmNRen2/QAPUMN/SmRfIdOaU 8KTczNVb0ZZ0xdDAgqHQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1moC3r-00Be3l-Fm; Fri, 19 Nov 2021 22:08:47 +0000 Received: from mail-pf1-x42f.google.com ([2607:f8b0:4864:20::42f]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1moC3H-00Bdsf-Mo; Fri, 19 Nov 2021 22:08:13 +0000 Received: by mail-pf1-x42f.google.com with SMTP id x5so10525837pfr.0; Fri, 19 Nov 2021 14:08:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=SdN+YJ62TXrTSxCxmD4U/e88GUhW9Xo7AMa+zjJB9y8=; b=OXp8MSbilwTmttnGLC/21f13Z6KyQ05Rx6hfbNx0hQlrVzvHAr7HYuQM6ERfKt2RlY uO6Qnd1JoKkEpq8OslqJONPW3DNXSM1Jhzp5CgGNEFlwZMCTWCf7FzqSamXk4sIe5Wll FuwAip0wibmXE2EleQyzDusP9eHVwzadCE6bm9LhQs82QkMWyS2NZ9b/ByvjZju8jlzW xwJCb7Dv9hlasCsLYQCUPmW8YiUogs/GWtQ5//F9o/3suayeJsRmJGAro9h+XwV4aePl PfGrtYBjSOaq6h3bDgn4J1HfYJmq6wZBiedugGK++gEOK0siS2e9DBfbE04Kt7SAIzRM wi5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=SdN+YJ62TXrTSxCxmD4U/e88GUhW9Xo7AMa+zjJB9y8=; b=D3g6au3VboIOahEHeboKbQkrVuGRMv8X0RBx51jUtC3D8F5JEtw1waozeOanyhHF5o zGkQ7mVjgpFJsrp/yYs8uSCL0y0uKciT7FQTSTrz57zUnaP7oJ5Z3K8NyiC+rJ5omxq1 LZUpHIj5ENKFKqUtVzi1eaQykgS0pkmpfSjAz/+k/2JhNwLzZtl3Iz3HcQt9JvMsy5W6 HerGZGC/cfGtj6ddgjD+nmwSOpBKLiAc4CWTYucibaD7TENOA4e/sURBOs7wk+xLPU4N 0GGyOZxCVhEj+pDrGFNPxjogJkCszBVQSQRFbba86s7CYMNrFQwRLCpwuYqttHzRNHUo iQWw== X-Gm-Message-State: AOAM531ygInw9M3fDnK6FGd7E+o+mWC4A0ghtqgwCkUVUY4N1BqGSgZs OahLBrpm0FV+E57FK4AJYP4= X-Google-Smtp-Source: ABdhPJzH681ogPXuizx1FhR1dB0O3FWsPhf1C1SLgnj8C4S4k5xTzla+QD2tHL+WWWqgejCeApdhHg== X-Received: by 2002:a05:6a00:10d1:b0:47b:aa9b:1e7a with SMTP id d17-20020a056a0010d100b0047baa9b1e7amr26141445pfu.57.1637359685874; Fri, 19 Nov 2021 14:08:05 -0800 (PST) Received: from stbsrv-and-01.and.broadcom.net ([192.19.11.250]) by smtp.gmail.com with ESMTPSA id t2sm612940pfd.36.2021.11.19.14.08.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Nov 2021 14:08:05 -0800 (PST) From: Jim Quinlan To: linux-pci@vger.kernel.org, Bjorn Helgaas , Nicolas Saenz Julienne , Rob Herring , Mark Brown , bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com, james.quinlan@broadcom.com Cc: Florian Fainelli , Rob Herring , Saenz Julienne , linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE), linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v9 2/7] dt-bindings: PCI: Correct brcmstb interrupts, interrupt-map. Date: Fri, 19 Nov 2021 17:07:49 -0500 Message-Id: <20211119220756.18628-3-jim2101024@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211119220756.18628-1-jim2101024@gmail.com> References: <20211119220756.18628-1-jim2101024@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211119_140811_910746_FC5413D1 X-CRM114-Status: GOOD ( 10.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The "pcie" and "msi" interrupts were given the same interrupt when they are actually different. Interrupt-map only had the INTA entry; the INTB, INTC, and INTD entries are added. Signed-off-by: Jim Quinlan Acked-by: Florian Fainelli Acked-by: Rob Herring --- Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml index 1fe102743f82..22f2ef446f18 100644 --- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml @@ -143,11 +143,15 @@ examples: #address-cells = <3>; #size-cells = <2>; #interrupt-cells = <1>; - interrupts = , + interrupts = , ; interrupt-names = "pcie", "msi"; interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH + 0 0 0 2 &gicv2 GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH + 0 0 0 3 &gicv2 GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH + 0 0 0 4 &gicv2 GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; + msi-parent = <&pcie0>; msi-controller; ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>;