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[84.72.105.84]) by smtp.gmail.com with ESMTPSA id l7sm6821130wry.86.2021.11.26.04.27.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Nov 2021 04:27:44 -0800 (PST) From: Nicolas Frattaroli To: Rob Herring , Heiko Stuebner Cc: Nicolas Frattaroli , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/2] arm64: dts: rockchip: Enable HDMI audio on Quartz64 A Date: Fri, 26 Nov 2021 13:27:18 +0100 Message-Id: <20211126122718.631506-3-frattaroli.nicolas@gmail.com> X-Mailer: git-send-email 2.34.0 In-Reply-To: <20211126122718.631506-1-frattaroli.nicolas@gmail.com> References: <20211126122718.631506-1-frattaroli.nicolas@gmail.com> MIME-Version: 1.0 X-Patchwork-Bot: notify X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211126_042746_423282_7C9D1A13 X-CRM114-Status: GOOD ( 10.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This enables the i2s0 controller and the hdmi-sound node on the PINE64 Quartz64 Model A single-board computer. Signed-off-by: Nicolas Frattaroli --- arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts index a4453c82b03d..0598510dce58 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts @@ -215,6 +215,10 @@ &hdmi_in_vp0 { status = "okay"; }; +&hdmi_sound { + status = "okay"; +}; + &gpu { mali-supply = <&vdd_gpu>; status = "okay"; @@ -444,6 +448,10 @@ regulator-state-mem { }; }; +&i2s0_8ch { + status = "okay"; +}; + &i2s1_8ch { pinctrl-names = "default"; pinctrl-0 = <&i2s1m0_sclktx