diff mbox series

[1/2] dt-bindings: clock: exynos850: Add bindings for Exynos850 sysreg clocks

Message ID 20211126203641.24005-1-semen.protsenko@linaro.org (mailing list archive)
State New, archived
Headers show
Series [1/2] dt-bindings: clock: exynos850: Add bindings for Exynos850 sysreg clocks | expand

Commit Message

Sam Protsenko Nov. 26, 2021, 8:36 p.m. UTC
System Register is used to configure system behavior, like USI protocol,
etc. SYSREG clocks should be provided to corresponding syscon nodes, to
make it possible to modify SYSREG registers.

While at it, add also missing PMU and GPIO clocks, which looks necessary
and might be needed for corresponding Exynos850 features soon.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
 include/dt-bindings/clock/exynos850.h | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

Comments

Krzysztof Kozlowski Nov. 27, 2021, 1:18 p.m. UTC | #1
On 26/11/2021 21:36, Sam Protsenko wrote:
> System Register is used to configure system behavior, like USI protocol,
> etc. SYSREG clocks should be provided to corresponding syscon nodes, to
> make it possible to modify SYSREG registers.
> 
> While at it, add also missing PMU and GPIO clocks, which looks necessary
> and might be needed for corresponding Exynos850 features soon.
> 
> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> ---
>  include/dt-bindings/clock/exynos850.h | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
> 


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>


Best regards,
Krzysztof
Rob Herring Dec. 2, 2021, 12:12 a.m. UTC | #2
On Fri, 26 Nov 2021 22:36:40 +0200, Sam Protsenko wrote:
> System Register is used to configure system behavior, like USI protocol,
> etc. SYSREG clocks should be provided to corresponding syscon nodes, to
> make it possible to modify SYSREG registers.
> 
> While at it, add also missing PMU and GPIO clocks, which looks necessary
> and might be needed for corresponding Exynos850 features soon.
> 
> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> ---
>  include/dt-bindings/clock/exynos850.h | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
> 

Acked-by: Rob Herring <robh@kernel.org>
Sam Protsenko Dec. 7, 2021, 8:54 p.m. UTC | #3
On Thu, 2 Dec 2021 at 02:12, Rob Herring <robh@kernel.org> wrote:
>
> On Fri, 26 Nov 2021 22:36:40 +0200, Sam Protsenko wrote:
> > System Register is used to configure system behavior, like USI protocol,
> > etc. SYSREG clocks should be provided to corresponding syscon nodes, to
> > make it possible to modify SYSREG registers.
> >
> > While at it, add also missing PMU and GPIO clocks, which looks necessary
> > and might be needed for corresponding Exynos850 features soon.
> >
> > Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> > ---
> >  include/dt-bindings/clock/exynos850.h | 12 +++++++++---
> >  1 file changed, 9 insertions(+), 3 deletions(-)
> >
>
> Acked-by: Rob Herring <robh@kernel.org>

Hi Sylwester,

Can you please review and apply this series, if it's ok?

Thanks!
Sam Protsenko Dec. 14, 2021, 4:15 p.m. UTC | #4
On Tue, 7 Dec 2021 at 22:54, Sam Protsenko <semen.protsenko@linaro.org> wrote:
>
> On Thu, 2 Dec 2021 at 02:12, Rob Herring <robh@kernel.org> wrote:
> >
> > On Fri, 26 Nov 2021 22:36:40 +0200, Sam Protsenko wrote:
> > > System Register is used to configure system behavior, like USI protocol,
> > > etc. SYSREG clocks should be provided to corresponding syscon nodes, to
> > > make it possible to modify SYSREG registers.
> > >
> > > While at it, add also missing PMU and GPIO clocks, which looks necessary
> > > and might be needed for corresponding Exynos850 features soon.
> > >
> > > Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> > > ---
> > >  include/dt-bindings/clock/exynos850.h | 12 +++++++++---
> > >  1 file changed, 9 insertions(+), 3 deletions(-)
> > >
> >
> > Acked-by: Rob Herring <robh@kernel.org>
>
> Hi Sylwester,
>
> Can you please review and apply this series, if it's ok?
>

Hi Krzysztof,

Do you think it's possible to take this series in your tree? Once it's
applied, I can send the board support (dts) series -- this is the only
remaining blocker for that right now.

Thanks!

> Thanks!
Krzysztof Kozlowski Dec. 14, 2021, 4:20 p.m. UTC | #5
On 14/12/2021 17:15, Sam Protsenko wrote:
> On Tue, 7 Dec 2021 at 22:54, Sam Protsenko <semen.protsenko@linaro.org> wrote:
>>
>> On Thu, 2 Dec 2021 at 02:12, Rob Herring <robh@kernel.org> wrote:
>>>
>>> On Fri, 26 Nov 2021 22:36:40 +0200, Sam Protsenko wrote:
>>>> System Register is used to configure system behavior, like USI protocol,
>>>> etc. SYSREG clocks should be provided to corresponding syscon nodes, to
>>>> make it possible to modify SYSREG registers.
>>>>
>>>> While at it, add also missing PMU and GPIO clocks, which looks necessary
>>>> and might be needed for corresponding Exynos850 features soon.
>>>>
>>>> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
>>>> ---
>>>>  include/dt-bindings/clock/exynos850.h | 12 +++++++++---
>>>>  1 file changed, 9 insertions(+), 3 deletions(-)
>>>>
>>>
>>> Acked-by: Rob Herring <robh@kernel.org>
>>
>> Hi Sylwester,
>>
>> Can you please review and apply this series, if it's ok?
>>
> 
> Hi Krzysztof,
> 
> Do you think it's possible to take this series in your tree? Once it's
> applied, I can send the board support (dts) series -- this is the only
> remaining blocker for that right now.

I would need an Ack from Sylwester anyway. If you have dependencies (the
DTS), you should send them together with it. Once Sylwester applies this
patch, the DTS either waits till next release or it has to be modified
to not depend on this patch.

Best regards,
Krzysztof
Krzysztof Kozlowski Dec. 18, 2021, 10:50 a.m. UTC | #6
On 14/12/2021 17:20, Krzysztof Kozlowski wrote:
> On 14/12/2021 17:15, Sam Protsenko wrote:
>> On Tue, 7 Dec 2021 at 22:54, Sam Protsenko <semen.protsenko@linaro.org> wrote:
>>>
>>> On Thu, 2 Dec 2021 at 02:12, Rob Herring <robh@kernel.org> wrote:
>>>>
>>>> On Fri, 26 Nov 2021 22:36:40 +0200, Sam Protsenko wrote:
>>>>> System Register is used to configure system behavior, like USI protocol,
>>>>> etc. SYSREG clocks should be provided to corresponding syscon nodes, to
>>>>> make it possible to modify SYSREG registers.
>>>>>
>>>>> While at it, add also missing PMU and GPIO clocks, which looks necessary
>>>>> and might be needed for corresponding Exynos850 features soon.
>>>>>
>>>>> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
>>>>> ---
>>>>>  include/dt-bindings/clock/exynos850.h | 12 +++++++++---
>>>>>  1 file changed, 9 insertions(+), 3 deletions(-)
>>>>>
>>>>
>>>> Acked-by: Rob Herring <robh@kernel.org>
>>>
>>> Hi Sylwester,
>>>
>>> Can you please review and apply this series, if it's ok?
>>>
>>
>> Hi Krzysztof,
>>
>> Do you think it's possible to take this series in your tree? Once it's
>> applied, I can send the board support (dts) series -- this is the only
>> remaining blocker for that right now.
> 
> I would need an Ack from Sylwester anyway. If you have dependencies (the
> DTS), you should send them together with it. Once Sylwester applies this
> patch, the DTS either waits till next release or it has to be modified
> to not depend on this patch.

Sylwester,

We need decision from your side. The apply-window is slowly closing, so
at least take it so DTSI will be free to go next cycle.

Best regards,
Krzysztof
Alim Akhtar Dec. 19, 2021, 11:17 a.m. UTC | #7
On Mon, Nov 29, 2021 at 7:08 PM Sam Protsenko
<semen.protsenko@linaro.org> wrote:
>
> System Register is used to configure system behavior, like USI protocol,
> etc. SYSREG clocks should be provided to corresponding syscon nodes, to
> make it possible to modify SYSREG registers.
>
> While at it, add also missing PMU and GPIO clocks, which looks necessary
> and might be needed for corresponding Exynos850 features soon.
>
> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> ---
>  include/dt-bindings/clock/exynos850.h | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
>
Looks good, feel free to add

Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>



> diff --git a/include/dt-bindings/clock/exynos850.h b/include/dt-bindings/clock/exynos850.h
> index 8aa5e82af0d3..0b6a3c6a7c90 100644
> --- a/include/dt-bindings/clock/exynos850.h
> +++ b/include/dt-bindings/clock/exynos850.h
> @@ -82,7 +82,10 @@
>  #define CLK_GOUT_I3C_PCLK              19
>  #define CLK_GOUT_I3C_SCLK              20
>  #define CLK_GOUT_SPEEDY_PCLK           21
> -#define APM_NR_CLK                     22
> +#define CLK_GOUT_GPIO_ALIVE_PCLK       22
> +#define CLK_GOUT_PMU_ALIVE_PCLK                23
> +#define CLK_GOUT_SYSREG_APM_PCLK       24
> +#define APM_NR_CLK                     25
>
>  /* CMU_CMGP */
>  #define CLK_RCO_CMGP                   1
> @@ -99,7 +102,8 @@
>  #define CLK_GOUT_CMGP_USI0_PCLK                12
>  #define CLK_GOUT_CMGP_USI1_IPCLK       13
>  #define CLK_GOUT_CMGP_USI1_PCLK                14
> -#define CMGP_NR_CLK                    15
> +#define CLK_GOUT_SYSREG_CMGP_PCLK      15
> +#define CMGP_NR_CLK                    16
>
>  /* CMU_HSI */
>  #define CLK_MOUT_HSI_BUS_USER          1
> @@ -167,7 +171,9 @@
>  #define CLK_GOUT_MMC_EMBD_SDCLKIN      10
>  #define CLK_GOUT_SSS_ACLK              11
>  #define CLK_GOUT_SSS_PCLK              12
> -#define CORE_NR_CLK                    13
> +#define CLK_GOUT_GPIO_CORE_PCLK                13
> +#define CLK_GOUT_SYSREG_CORE_PCLK      14
> +#define CORE_NR_CLK                    15
>
>  /* CMU_DPU */
>  #define CLK_MOUT_DPU_USER              1
> --
> 2.30.2
>
diff mbox series

Patch

diff --git a/include/dt-bindings/clock/exynos850.h b/include/dt-bindings/clock/exynos850.h
index 8aa5e82af0d3..0b6a3c6a7c90 100644
--- a/include/dt-bindings/clock/exynos850.h
+++ b/include/dt-bindings/clock/exynos850.h
@@ -82,7 +82,10 @@ 
 #define CLK_GOUT_I3C_PCLK		19
 #define CLK_GOUT_I3C_SCLK		20
 #define CLK_GOUT_SPEEDY_PCLK		21
-#define APM_NR_CLK			22
+#define CLK_GOUT_GPIO_ALIVE_PCLK	22
+#define CLK_GOUT_PMU_ALIVE_PCLK		23
+#define CLK_GOUT_SYSREG_APM_PCLK	24
+#define APM_NR_CLK			25
 
 /* CMU_CMGP */
 #define CLK_RCO_CMGP			1
@@ -99,7 +102,8 @@ 
 #define CLK_GOUT_CMGP_USI0_PCLK		12
 #define CLK_GOUT_CMGP_USI1_IPCLK	13
 #define CLK_GOUT_CMGP_USI1_PCLK		14
-#define CMGP_NR_CLK			15
+#define CLK_GOUT_SYSREG_CMGP_PCLK	15
+#define CMGP_NR_CLK			16
 
 /* CMU_HSI */
 #define CLK_MOUT_HSI_BUS_USER		1
@@ -167,7 +171,9 @@ 
 #define CLK_GOUT_MMC_EMBD_SDCLKIN	10
 #define CLK_GOUT_SSS_ACLK		11
 #define CLK_GOUT_SSS_PCLK		12
-#define CORE_NR_CLK			13
+#define CLK_GOUT_GPIO_CORE_PCLK		13
+#define CLK_GOUT_SYSREG_CORE_PCLK	14
+#define CORE_NR_CLK			15
 
 /* CMU_DPU */
 #define CLK_MOUT_DPU_USER		1