From patchwork Thu Dec 9 21:14:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jim Quinlan X-Patchwork-Id: 12695526 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 703F8C433F5 for ; Thu, 9 Dec 2021 21:16:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=TXFOVpJ95o3nh1Erb4ojLzD2UzpgfnRbCu92wM47yuo=; b=1DqircAWsVLack 4XvFv5NJcifQ49A7zWbMgijSXq66fa0Br88e4TK8FtLAiESVDOPQ9qDXzHS+8bo8nym1ZChhHOqSm qHz+yj6axeK9ZeiKV63YzMDpLkJP6e+LUBm9HAjxojZe5g+17DgtQH+5Tjxpr6xT+ItMZtlNGowWV xDqL57HvBOFt/pZcmFtK7BFgwIdLQTgRvOpg9xrg2HcwPqV1Lrdj4nMsJw1bNhTHOzgHbS0+/BFPl NDTtkHDL/dliMotPCgrlvGRshJKxdP9iw9GiuIpXOPLDsqpxXL12Wpbe9W40QeU6jY9CWyZZrI/56 MApsvDrdqY3GVNsToysw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mvQkT-0000u9-9J; Thu, 09 Dec 2021 21:14:41 +0000 Received: from mail-pj1-x1035.google.com ([2607:f8b0:4864:20::1035]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mvQk8-0000mp-2v; Thu, 09 Dec 2021 21:14:21 +0000 Received: by mail-pj1-x1035.google.com with SMTP id cq22-20020a17090af99600b001a9550a17a5so7937208pjb.2; Thu, 09 Dec 2021 13:14:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=SdN+YJ62TXrTSxCxmD4U/e88GUhW9Xo7AMa+zjJB9y8=; b=CEZjJ6rON2Dxa3ezTLBnLvMR8JtdoIvoXMd6bldW5WACutcqoiVcGHoSrvrq+9u4h/ 7qmo9g7x2ghdZF2IcsOBZvXjyma44FYIVcdfXR82SeNEXVqaNSzkNBSycZ6RznMZu1XW gJsfvSpJzUsqqY1TiaIAKSnEtpp9lJGY0Tiiz20PMsXtZMMcvVQ6JJ3Uk7GKyGWVINFF ZM9uTpIZFm3izf0KLV7TVfpNc9fNkuCsG+o0SdEa5xqRvtc7NJpdZ3lNSQkJuHhni5yA gNzedWwEu1UkpKi9mWsutT5EcyGEGhQAujI/9dkYlJpPvAw5GulJL5PErUSUgE0walqI 2cwg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=SdN+YJ62TXrTSxCxmD4U/e88GUhW9Xo7AMa+zjJB9y8=; b=URckWTxZLib+L3Na2QcGbqWA4LVA8C0TTM28DMtXW+rn/nbmQPBHuNGWmP1y96wlaG bTIYhV8deoo4XuNjX5LAxwo1MoKZSNsGH/Z4GCq4aVAeEDWyHYfY7T45sIXY2zKxhUd/ bqlhnTNi0p6hUqjrxkOtFcYQGYKIDck/XfmnJZ7tFaHQKEMILJ78dS8Bd0lNOfQFb3/4 UcuV6kJXioQV0QaPRMOtjHXv+1srLobbWne82yG6C0cxmy8AGRKw0NVjU+g5tPBMBqJv etCXb5hr5LC3wZyEsm3sa+TpabJdLEAYXo9wlfos16wlN+8p0JhHr/OvArO1Wvsey7tN L4IQ== X-Gm-Message-State: AOAM5316hGjG2SdPNst+/yI37aB0uKMDV+DiRTFt/dssWPF9f6V5hP3p /LmfK5v0wkHGRxCRhs0tB1g= X-Google-Smtp-Source: ABdhPJzqVVumJ3K1t4eLgI7bjrMOMjAALVydzHN2xhAvcY7W0nVSPYKGnq9OxqzOvAQMmVZEUhty7Q== X-Received: by 2002:a17:903:2004:b0:142:6344:2c08 with SMTP id s4-20020a170903200400b0014263442c08mr70192503pla.51.1639084459578; Thu, 09 Dec 2021 13:14:19 -0800 (PST) Received: from stbsrv-and-01.and.broadcom.net ([192.19.11.250]) by smtp.gmail.com with ESMTPSA id y4sm617800pfi.178.2021.12.09.13.14.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Dec 2021 13:14:19 -0800 (PST) From: Jim Quinlan To: linux-pci@vger.kernel.org, Bjorn Helgaas , Nicolas Saenz Julienne , Rob Herring , Mark Brown , bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com, james.quinlan@broadcom.com Cc: Florian Fainelli , Rob Herring , Saenz Julienne , linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v10 2/7] dt-bindings: PCI: Correct brcmstb interrupts, interrupt-map. Date: Thu, 9 Dec 2021 16:14:00 -0500 Message-Id: <20211209211407.8102-3-jim2101024@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211209211407.8102-1-jim2101024@gmail.com> References: <20211209211407.8102-1-jim2101024@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211209_131420_155147_2B23AE09 X-CRM114-Status: UNSURE ( 9.67 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The "pcie" and "msi" interrupts were given the same interrupt when they are actually different. Interrupt-map only had the INTA entry; the INTB, INTC, and INTD entries are added. Signed-off-by: Jim Quinlan Acked-by: Florian Fainelli Acked-by: Rob Herring --- Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml index 1fe102743f82..22f2ef446f18 100644 --- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml @@ -143,11 +143,15 @@ examples: #address-cells = <3>; #size-cells = <2>; #interrupt-cells = <1>; - interrupts = , + interrupts = , ; interrupt-names = "pcie", "msi"; interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH + 0 0 0 2 &gicv2 GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH + 0 0 0 3 &gicv2 GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH + 0 0 0 4 &gicv2 GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; + msi-parent = <&pcie0>; msi-controller; ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>;