diff mbox series

[5/6] arm64: dts: mt8195: Add APU power domain node

Message ID 20211210173743.30906-6-flora.fu@mediatek.com (mailing list archive)
State New, archived
Headers show
Series Add MT8195 APU Power Domain | expand

Commit Message

Flora Fu Dec. 10, 2021, 5:37 p.m. UTC 
Add APU power domain node to MT8195.

Signed-off-by: Flora Fu <flora.fu@mediatek.com>

---
 arch/arm64/boot/dts/mediatek/mt8195.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 828ac8a6b95f..6e60c4a38495 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -1375,6 +1375,22 @@ 
 			reg = <0 0x19029000 0 0x1000>;
 		};
 
+		apuspm: power-domain@190f0000 {
+			compatible = "mediatek,mt8195-apu-pm", "syscon";
+			reg = <0 0x190f0000 0 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			#power-domain-cells = <1>;
+			mediatek,scpsys = <&scpsys>;
+			mediatek,apu-conn = <&apu_conn>;
+			mediatek,apu-conn1 = <&apu_conn1>;
+			mediatek,apu-vcore = <&apu_vcore>;
+			apu_top: power-domain@0 {
+				reg = <0>;
+				#power-domain-cells = <0>;
+			};
+		};
+
 		apusys_pll: clock-controller@190f3000 {
 			compatible = "mediatek,mt8195-apusys_pll";
 			reg = <0 0x190f3000 0 0x1000>;