diff mbox series

[v2] arm64: dts: imx8mq: disable DDRC node by default

Message ID 20211218181808.235310-1-dev@lynxeye.de (mailing list archive)
State New, archived
Headers show
Series [v2] arm64: dts: imx8mq: disable DDRC node by default | expand

Commit Message

Lucas Stach Dec. 18, 2021, 6:18 p.m. UTC 
Without a OPP table or a downstream TF-A running on the system the DDRC will
fail to probe, as it has no means to scale the DRAM frequency in that case.
This however will block the bus scaling driver to come up and this in turn
prevents other devices that hook into the interconnect from probing.

If the DDRC is disabled, the interconnect driver will simply ignore it. As
most systems don't want to scale the DRAM frequency, disable the node by
default and only enable it on the systems that actually uses this
capability and provides a valid OPP table in the DT.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Reviewed-by: Guido Günther <agx@sigxcpu.org>
---
v2: move status to end of property list
---
 arch/arm64/boot/dts/freescale/imx8mq-evk.dts      | 1 +
 arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi | 1 +
 arch/arm64/boot/dts/freescale/imx8mq.dtsi         | 1 +
 3 files changed, 3 insertions(+)

Comments

Shawn Guo Jan. 26, 2022, 1:10 p.m. UTC | #1 
On Sat, Dec 18, 2021 at 07:18:08PM +0100, Lucas Stach wrote:
> Without a OPP table or a downstream TF-A running on the system the DDRC will
> fail to probe, as it has no means to scale the DRAM frequency in that case.
> This however will block the bus scaling driver to come up and this in turn
> prevents other devices that hook into the interconnect from probing.
> 
> If the DDRC is disabled, the interconnect driver will simply ignore it. As
> most systems don't want to scale the DRAM frequency, disable the node by
> default and only enable it on the systems that actually uses this
> capability and provides a valid OPP table in the DT.
> 
> Signed-off-by: Lucas Stach <dev@lynxeye.de>
> Reviewed-by: Fabio Estevam <festevam@gmail.com>
> Acked-by: Martin Kepplinger <martin.kepplinger@puri.sm>
> Reviewed-by: Guido Günther <agx@sigxcpu.org>

Applied, thanks!
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
index b83df77195ec..67682ded0a34 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
@@ -123,6 +123,7 @@  &A53_3 {
 
 &ddrc {
 	operating-points-v2 = <&ddrc_opp_table>;
+	status = "okay";
 
 	ddrc_opp_table: opp-table {
 		compatible = "operating-points-v2";
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
index 60d47c71499b..6765bda12823 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
@@ -239,6 +239,7 @@  &A53_3 {
 
 &ddrc {
 	operating-points-v2 = <&ddrc_opp_table>;
+	status = "okay";
 
 	ddrc_opp_table: opp-table {
 		compatible = "operating-points-v2";
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 972766b67a15..f5af9765e239 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -1554,6 +1554,7 @@  ddrc: memory-controller@3d400000 {
 				 <&clk IMX8MQ_DRAM_PLL_OUT>,
 				 <&clk IMX8MQ_CLK_DRAM_ALT>,
 				 <&clk IMX8MQ_CLK_DRAM_APB>;
+			status = "disabled";
 		};
 
 		ddr-pmu@3d800000 {