From patchwork Sun Jan 2 16:57:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Romain Perier X-Patchwork-Id: 12702314 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EF3C7C433FE for ; Sun, 2 Jan 2022 16:59:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=NX/KOkR6fzz5Q3piP5PygM9rSC7vELKZhE47roDVGOU=; b=jjW6O3PzDjpnSF XRNVzhROm4keRhz68gDV+IQbFPkK8gJhYxljYeUkepMbSvP/6EIfbkMZVhaZ7NN+8wRzmWl9kSAnc 6ClM2NHASbxbbVAiiX3ZotqYoFUW5sVetX/EVA27C5KXFL1R7GzjwjJgKY2xf20w1pRNX+B72r4RX tJwBzzqsThmW7wlWi/umngtq3fH6v3erkVoAmVZ0CwQF/vzx/DgrGGa3XMfRWm/ALug2My1t7WWD0 Lc/37vDEKsFBVTY5NrPhADDEWrnDnNzsqSt5uEeumKcq+7YTpcl0iza+TC6FWOjwk/skuqj+vDqm7 WvABVwCR4NHukFh2XWMQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1n44B3-007yrT-Mp; Sun, 02 Jan 2022 16:57:49 +0000 Received: from mail-wr1-x436.google.com ([2a00:1450:4864:20::436]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1n44Ar-007ymc-5j for linux-arm-kernel@lists.infradead.org; Sun, 02 Jan 2022 16:57:38 +0000 Received: by mail-wr1-x436.google.com with SMTP id d9so65770653wrb.0 for ; Sun, 02 Jan 2022 08:57:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xY5sdN/MjZvpkzIVHRkalM0h2jmAhubj3ucgmZy/xLE=; b=i8OYmVcfHjMRcYo9XYExn4e2LNHOqCu1kTC+mLNyb1O47gYyzhvVI3sN2L7M8JFbvL qr5ahmw45IF7mWqD/M12tFe3IfZDoor+Jry72WbiuC1IzkXFrA2SS1uP1IygNh6NwInG cKzxx3gu0Any4MqLizbuaAL7Q7DlWh7mdjrQYsXpLEE7F5XXbKvEyndvSIZsir4xFqqk JuMD1OPQFzRbNiIqqbEvWGscH1wDS+sdXf2snHWc/It7j0+RplOnCyTVftHHhC90cEa4 bdP2Sh+pUK6cuSFcyrdeubEUH6mwkq8K3BmTKxEbvP0Xh6uFPpE0pc7QRFCZ5mZ0gXBJ cNfw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xY5sdN/MjZvpkzIVHRkalM0h2jmAhubj3ucgmZy/xLE=; b=Lh+xYRobxg7VEgrtHNwLjQcAvQCgQCmvg0gDR4xxBsOeNC8eYvqYEyn0a6Q7pg1o7q 5bu4FmMko4F9SZwfGuU8+I3MncmEsK4B+DkcdaPjjnbdntg7sWxBVZgHgxvN2GOWSvY3 LEW283nRJw4okBYC2tqTX5Un9HojtSzh0K+JLVySD0YOK2yQdLw3ZKScxEZm4mRvfoeB HKUJvOd/tzagFfwkilLs25P8pFwZST4wQFEfkstwIlSm3zuFV/IRRSsJYZXwF8SQcE31 ISfud1iBL5Wdm40jKDHG3kPbrenhyvKuqquIsxhTs7J6BV/IKvhcAxzBiwwbsBL1gLoG Qlow== X-Gm-Message-State: AOAM531N615uB/UgB4V4n42tKyep8rs0guZrInmiRFbU1+l0t5+u3aQS wwKV/Nr+OHVoSn0864eMb7s= X-Google-Smtp-Source: ABdhPJzdOuDFcSB38KIyoLrnqkve6qQFfKNS1W+N8l0uI2s/gbI4hx/9N/M6aAIWfb3msaI4TUvdGg== X-Received: by 2002:a05:6000:188c:: with SMTP id a12mr38138519wri.45.1641142655727; Sun, 02 Jan 2022 08:57:35 -0800 (PST) Received: from debby ([2a01:e0a:a6d:a8d0:7ff4:8f61:5574:9f95]) by smtp.gmail.com with ESMTPSA id bg12sm40620846wmb.5.2022.01.02.08.57.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 Jan 2022 08:57:35 -0800 (PST) From: Romain Perier To: Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org, Arnd Bergmann , Daniel Palmer , Romain Perier , Rob Herring Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/9] dt-bindings: clk: mstar msc313 cpupll binding description Date: Sun, 2 Jan 2022 17:57:22 +0100 Message-Id: <20220102165730.50190-2-romain.perier@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220102165730.50190-1-romain.perier@gmail.com> References: <20220102165730.50190-1-romain.perier@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220102_085737_242015_15E36B29 X-CRM114-Status: GOOD ( 15.30 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Daniel Palmer Add a binding description for the MStar/SigmaStar CPU PLL block. Signed-off-by: Daniel Palmer Reviewed-by: Rob Herring --- .../bindings/clock/mstar,msc313-cpupll.yaml | 45 +++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/mstar,msc313-cpupll.yaml diff --git a/Documentation/devicetree/bindings/clock/mstar,msc313-cpupll.yaml b/Documentation/devicetree/bindings/clock/mstar,msc313-cpupll.yaml new file mode 100644 index 000000000000..a9ad7ab5230c --- /dev/null +++ b/Documentation/devicetree/bindings/clock/mstar,msc313-cpupll.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/mstar,msc313-cpupll.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MStar/Sigmastar MSC313 CPU PLL + +maintainers: + - Daniel Palmer + +description: | + The MStar/SigmaStar MSC313 and later ARMv7 chips have a scalable + PLL that can be used as the clock source for the CPU(s). + +properties: + compatible: + const: mstar,msc313-cpupll + + "#clock-cells": + const: 1 + + clocks: + maxItems: 1 + + reg: + maxItems: 1 + +required: + - compatible + - "#clock-cells" + - clocks + - reg + +additionalProperties: false + +examples: + - | + #include + cpupll: cpupll@206400 { + compatible = "mstar,msc313-cpupll"; + reg = <0x206400 0x200>; + #clock-cells = <1>; + clocks = <&mpll MSTAR_MSC313_MPLL_DIV2>; + };