From patchwork Sun Jan 2 16:57:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Romain Perier X-Patchwork-Id: 12702319 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3CD33C433F5 for ; Sun, 2 Jan 2022 17:00:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=6vD39w+51XSMPo3Ewt2sTEqNG6g1NMJdpfqFKyShc/0=; b=FATFTu7bHWRfHJ I9ph83HrTrxyW8qRAVWkBuyS1iCPZOl2lwAwXIeRhC46qiIAqZs00FIW3XL23nLu7n9vdbV2NQQRb bxw2Ym11yBiE9QotBK2Bt/1Mw16+MrtMENmRz5P3204A4XUAanaTXSpGJ5cUYjcOHkkf9TD2ZO5eO q+wxTZS3q+WU3Cugf8GfPuDHQKGQzUZk06MFiuOT04BeuNPeHjYxYCrNk4DfLXQ6KB4AhBeZTQeHc IIufF5y8FmnXYFpG+HNlGwPxT81Xl8Ls/TpWdg/7T7gjqxwFKSjZdexlQtbzd4/MuiAclw29CvDYu xt9QNFYSwGfk9zJ9XzqA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1n44CF-007zJP-Tr; Sun, 02 Jan 2022 16:59:04 +0000 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1n44Ax-007yow-Ey for linux-arm-kernel@lists.infradead.org; Sun, 02 Jan 2022 16:57:44 +0000 Received: by mail-wr1-x42a.google.com with SMTP id w20so56682993wra.9 for ; Sun, 02 Jan 2022 08:57:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=21h9f/ui8ZIqSSrHzJ4KrN8YACvdlcc8m+OIu8z6NvM=; b=ElGGNSCD9QRK7+dw5nfGGhnn8BxEqs9+Jm/XI0ZtwxDwdeI7y6hp/nKKzi8OmmkTfd DfesxdRQQk9RqiyI/gy8nV7M1JGKw5EXwm1V8ZsxS4++cNwA9Y9cvcGFKl3yJ4TYDFJR PdQo3mBGXpTYUy6CjffI3IEKAMAs0z/QXgFssHDMe0orAfv10vB6jROWsQZ3td7PZ/Cd L9axkJZxSYMmyaxtnUMJ6UL9CFqC7S8Zsv4AXyzVbkF6LBpcxF/KA/W4R0WmoM6CWEYp Rd2Zt7f2YKdTAI+W8rAJkk5EKgtHHmQ2E9c8rt/nJgcbaTcrXFkVN5W0pZaqji6gTMJD E99w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=21h9f/ui8ZIqSSrHzJ4KrN8YACvdlcc8m+OIu8z6NvM=; b=d2BgZKy0KUzHCD+kaRP+zUoXgDEJW1uqjU7F8GWp0u1omGh+rY9Px2n8rKC55Ef06e Ul//5l2vXD4WJ5hUJ2u9Y0dcVK1sXwdo85raSh/OjbXFlHI882SmnVN8tHOTRqds5gN9 wtsDgGXWqdbiIKOSlDyMzrEcVVJOWxHzktSnT1WJal9GHxnZFEV1dFTS2jiH+1w/BSXY J4HV6cYcMSkv4ai01scqF02BgX9ln1Ig91etLi/28atx8dLN+DkVKdH0cM6/pk9MvwQg Gr9UwRfTLDvnpU5XkOk+qnqNR7X11NM7kw+se97VdI0IQk2I0TyzPWGOyN70GVkOCDkV iKEw== X-Gm-Message-State: AOAM531y2fVch9HLRng6sgFS337YXb5/6Yly4dy6d9Dyx7BYtbMVQldY HTznriXZeDTqTvRVgpM+lcc= X-Google-Smtp-Source: ABdhPJwJOhTLzvSn3l0lO6PPzb+/Xo7IVWWa+kzDE8rxBggDHlIZdM774Ruhx9LE0tOuEbvyX2a6LA== X-Received: by 2002:a5d:440e:: with SMTP id z14mr14054757wrq.611.1641142661995; Sun, 02 Jan 2022 08:57:41 -0800 (PST) Received: from debby ([2a01:e0a:a6d:a8d0:7ff4:8f61:5574:9f95]) by smtp.gmail.com with ESMTPSA id y1sm32261901wrm.3.2022.01.02.08.57.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 Jan 2022 08:57:41 -0800 (PST) From: Romain Perier To: Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org, Arnd Bergmann , Daniel Palmer , Romain Perier , Rob Herring Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Willy Tarreau Subject: [PATCH v2 7/9] ARM: mstar: Add OPP table for infinity3 Date: Sun, 2 Jan 2022 17:57:28 +0100 Message-Id: <20220102165730.50190-8-romain.perier@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220102165730.50190-1-romain.perier@gmail.com> References: <20220102165730.50190-1-romain.perier@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220102_085743_529445_6D5C85FE X-CRM114-Status: GOOD ( 12.05 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Daniel Palmer The infinity3 has a slightly higher max frequency compared to the infinity so extend the OPP table. Co-authored-by: Willy Tarreau Signed-off-by: Daniel Palmer --- arch/arm/boot/dts/mstar-infinity3.dtsi | 58 ++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/arch/arm/boot/dts/mstar-infinity3.dtsi b/arch/arm/boot/dts/mstar-infinity3.dtsi index 9857e2a9934d..a56cf29e5d82 100644 --- a/arch/arm/boot/dts/mstar-infinity3.dtsi +++ b/arch/arm/boot/dts/mstar-infinity3.dtsi @@ -6,6 +6,64 @@ #include "mstar-infinity.dtsi" +&cpu0_opp_table { + opp-1008000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + }; + + // overclock frequencies below, shown to work fine up to 1.3 GHz + opp-108000000 { + opp-hz = /bits/ 64 <1080000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; + + opp-1188000000 { + opp-hz = /bits/ 64 <1188000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; + + opp-1296000000 { + opp-hz = /bits/ 64 <1296000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; + + opp-1350000000 { + opp-hz = /bits/ 64 <1350000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; + + opp-1404000000 { + opp-hz = /bits/ 64 <1404000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; + + opp-1458000000 { + opp-hz = /bits/ 64 <1458000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; + + opp-1512000000 { + opp-hz = /bits/ 64 <1512000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; +}; + &imi { reg = <0xa0000000 0x20000>; };