From patchwork Tue Jan 4 15:35:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 12703597 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9DCA0C433EF for ; Tue, 4 Jan 2022 15:43:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=lSjB9nuZ98bVysV4q5EJRXF4aD5dMuuAJ23A2Rw09vM=; b=qcCXKvkvcpfD0r +NTtf+YsL7Q5hdjUMLoVw7cEP6AV9aPZtnuDj59mJ3htRKQ4DIBL2SaypuEVf4BBQgC9Sfk9rb9Za uUpmm7zmgqEh+ak+FrinZrjrAVY0jlDwXprjp37TrwgwJ3EBLVyDAZa/WGj8TE/KE/dB8iZBtKIVc JT+w0HAmSngiNUlBJKLeWqUcJ7RXG+s6V7LmH+ITmY/yklPswSa2Wt4G6DkzxbWfsN3RWKvSRaudg 25rR2FGzIdgq6clHIFCUJvnh/vkFMFvGfcqGns/ZrKKxxup6BpPQ//MMW3Mq3mdzo1QHZZ6SQZ5Z7 PF3RYpsdIuTzU+AM4UWQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1n4lxU-00BzqP-HV; Tue, 04 Jan 2022 15:42:45 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1n4ltS-00BxqK-Cm for linux-arm-kernel@lists.infradead.org; Tue, 04 Jan 2022 15:38:35 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id 9E764CE1937; Tue, 4 Jan 2022 15:38:32 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 17B87C36AF2; Tue, 4 Jan 2022 15:38:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1641310712; bh=xxyZnGOuH63mToYeFJtMrqvVZxip4BN1x7ap3lhZeHA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BS0s+Z26wLT5UtAOTKS7r2L2eShBR7d099GDOIG09ymgvHAXOdP/3MA7zVXYsckTC bLYbOYH0jfGZNJxAjDxp0XojSI55IQTjJv5kxt3LcjIy6lumb33kc/74X94U0pVocl MWmNyywDVS01UQLQlCg2qaQh17yGZ9qxCABrrfO40FVuSogkQEBFkC3BxZqZm4ZLQW znP28m4nbBfolVseQuC8+CVtpj59eBqERZCMhWOriXMKIba/Wi9Ll2l2BXlvYCPd3t 0KNE9fwa01enLlH8TXibPVN9PylSuU27Krc/GvzXW1EhzleTYuqgTX6b8DWYSDGXHL r8XPSeZMixjvQ== Received: by pali.im (Postfix) id BFFE096B; Tue, 4 Jan 2022 16:38:31 +0100 (CET) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Thomas Petazzoni , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 10/11] PCI: mvebu: Update comment for PCI_EXP_LNKCTL register on emulated bridge Date: Tue, 4 Jan 2022 16:35:28 +0100 Message-Id: <20220104153529.31647-11-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220104153529.31647-1-pali@kernel.org> References: <20211221141455.30011-1-pali@kernel.org> <20220104153529.31647-1-pali@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220104_073834_655227_3684FED9 X-CRM114-Status: GOOD ( 14.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Logic and code for clearing PCI_EXP_LNKCTL_CLKREQ_EN bit is correct, but comment describing it is misleading. PCI_EXP_LNKCTL_CLKREQ_EN bit should be hardwired to zero but mvebu hw allows to change it. Signed-off-by: Pali Rohár --- drivers/pci/controller/pci-mvebu.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c index 1aac65977b97..dffa330de174 100644 --- a/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c @@ -663,10 +663,9 @@ mvebu_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge, case PCI_EXP_LNKCTL: /* - * If we don't support CLKREQ, we must ensure that the - * CLKREQ enable bit always reads zero. Since we haven't - * had this capability, and it's dependent on board wiring, - * disable it for the time being. + * PCIe requires that the Enable Clock Power Management bit + * is hard-wired to zero for downstream ports but HW allows + * to change it. */ new &= ~PCI_EXP_LNKCTL_CLKREQ_EN;