clk: visconti: fix array's data insert check

Commit Message

Tom Rix Jan. 7, 2022, 8:49 p.m. UTC

From: Tom Rix <[e-mail]>

Clang build fails with
pll.c:292:20: error: address of array 'ctx->clk_data.hws' will
  always evaluate to 'true'
        if (ctx->clk_data.hws && id)
            ~~~~~~~~~~~~~~^~~ ~~

This check protects inserting into the clk_data.hws array.
clk_data is allocated a trailing element of the ctx struct.
If the ctx is ok, the ctx->clk_data.hws will be ok.

Change to checking if 'id' falls outside of the array
bounds.

Fixes: b4cbe606dc36 ("clk: visconti: Add support common clock driver and reset driver")
Signed-off-by: Tom Rix <[e-mail]>
---
 drivers/clk/visconti/pll.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Patch

diff --git a/drivers/clk/visconti/pll.c b/drivers/clk/visconti/pll.c
index 3b6e88bb73d5b..7f2e1016536ab 100644
--- a/drivers/clk/visconti/pll.c
+++ b/drivers/clk/visconti/pll.c
@@ -289,7 +289,7 @@  static void visconti_pll_add_lookup(struct visconti_pll_provider *ctx,
 				    struct clk_hw *hw_clk,
 				    unsigned int id)
 {
-	if (ctx->clk_data.hws && id)
+	if (id < ctx->clk_data.num)
 		ctx->clk_data.hws[id] = hw_clk;
 }