From patchwork Mon Jan 10 01:49:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 12708065 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CBF48C433F5 for ; Mon, 10 Jan 2022 01:52:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Ft23Qy3YDoFETJugsUShJETp3sdAyxt+5Ab9Hz+0vOU=; b=32bKH5C5m683UJ wkYKgc21yXWC9wKVCs77zYA810t0T05DYi3jDPJeJYId1uUqOTe8ae0fUh2Ci962QNoQ5JUVUsFwH NdWimGGVXOg/QhxoqxTRswQ7FT2w8JssQWWsRAGNg05i3UmIW8BzcAIK9jG0TSE3U+arXpQjciiop GGRYGS5JtrgcXuMrqsq4EeuDXPdlZdNi7yI46k86DQRuufjDLER3iCOu4obBJzqFPkSPVPqDxuDxJ yeLedbsgOs/XiiYCDHCfYzymc5YUX0Qw2BgtuFHyxwa4Mog87+XTl3bCSzEj2SMikc0Bh2W1paRC1 OGbt+xHLxHqOyPYE2Ypg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1n6jps-008lmE-NV; Mon, 10 Jan 2022 01:51:00 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1n6jpP-008laK-RY for linux-arm-kernel@lists.infradead.org; Mon, 10 Jan 2022 01:50:33 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 800F5B8111A; Mon, 10 Jan 2022 01:50:29 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9AA6AC36AF5; Mon, 10 Jan 2022 01:50:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1641779428; bh=WlK2jvGZlR70DhVFOHRErXdLS0BK+jecbB6nUy5X55c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=vGKocFOl14XgdbYufSDEkwyQ047cvZVnTNLXO5lVtBhkGqtetN8wWRwatTv+/rZV8 bwyPbhdU3s6Mw7YOSlK3Z2/DGO1MwPSU7niyKFGoxqQAhssGhFtrsKylsHssphDoJ7 zFONXEDqZ6BDnlhrlubfZq5X3mQ66llqAkZVFLMvim7Xz7A7sd04Bsa7PuabczYAMQ gzMXHp7ybtztkNY/d8VNxkyHo4zbuOCfG88VDR4ucj9iB5hZfFOFDnhqlieRKijFCy wSTbwidMyFcfLBpNZht+ml+JKkHXsGkTuFKQxt/C+ljL+qePO6yUqmJMyOnzuLiVNQ CiQCbQr1kAJJA== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Marc Zyngier , Lorenzo Pieralisi , Bjorn Helgaas Cc: pali@kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 02/23] PCI: aardvark: Fix reading MSI interrupt number Date: Mon, 10 Jan 2022 02:49:57 +0100 Message-Id: <20220110015018.26359-3-kabel@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220110015018.26359-1-kabel@kernel.org> References: <20220110015018.26359-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220109_175032_060602_7DDF1516 X-CRM114-Status: GOOD ( 12.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Pali Rohár In advk_pcie_handle_msi() the authors expect that when bit i in the W1C register PCIE_MSI_STATUS_REG is cleared, the PCIE_MSI_PAYLOAD_REG is updated to contain the MSI number corresponding to index i. Experiments show that this is not so, and instead PCIE_MSI_PAYLOAD_REG always contains the number of the last received MSI, overall. Do not read PCIE_MSI_PAYLOAD_REG register for determining MSI interrupt number. Since Aardvark already forbids more than 32 interrupts and uses own allocated hwirq numbers, the msi_idx already corresponds to the received MSI number. Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller driver") Signed-off-by: Pali Rohár Signed-off-by: Marek Behún --- drivers/pci/controller/pci-aardvark.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 62baddd2ca95..fd95ad64c887 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -1393,7 +1393,6 @@ static void advk_pcie_remove_irq_domain(struct advk_pcie *pcie) static void advk_pcie_handle_msi(struct advk_pcie *pcie) { u32 msi_val, msi_mask, msi_status, msi_idx; - u16 msi_data; msi_mask = advk_readl(pcie, PCIE_MSI_MASK_REG); msi_val = advk_readl(pcie, PCIE_MSI_STATUS_REG); @@ -1403,13 +1402,9 @@ static void advk_pcie_handle_msi(struct advk_pcie *pcie) if (!(BIT(msi_idx) & msi_status)) continue; - /* - * msi_idx contains bits [4:0] of the msi_data and msi_data - * contains 16bit MSI interrupt number - */ advk_writel(pcie, BIT(msi_idx), PCIE_MSI_STATUS_REG); - msi_data = advk_readl(pcie, PCIE_MSI_PAYLOAD_REG) & PCIE_MSI_DATA_MASK; - generic_handle_irq(msi_data); + if (generic_handle_domain_irq(pcie->msi_inner_domain, msi_idx) == -EINVAL) + dev_err_ratelimited(&pcie->pdev->dev, "unexpected MSI 0x%02x\n", msi_idx); } advk_writel(pcie, PCIE_ISR0_MSI_INT_PENDING,