| Message ID | 20220112151541.1328732-4-m.tretter@pengutronix.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | dt-bindings: dmaengine: zynqmp_dma: Convert binding to YAML | expand |
On 1/12/22 16:15, Michael Tretter wrote: > The ZynqMP dma engines are actually dma-controllers as specified by the > device tree binding. Rename the device tree nodes accordingly. > > Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> > --- > arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 32 +++++++++++++------------- > 1 file changed, 16 insertions(+), 16 deletions(-) > > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > index 6d96b6b99f84..3e15391e5b37 100644 > --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > @@ -254,7 +254,7 @@ pmu@9000 { > }; > > /* GDMA */ > - fpd_dma_chan1: dma@fd500000 { > + fpd_dma_chan1: dma-controller@fd500000 { > status = "disabled"; > compatible = "xlnx,zynqmp-dma-1.0"; > reg = <0x0 0xfd500000 0x0 0x1000>; > @@ -267,7 +267,7 @@ fpd_dma_chan1: dma@fd500000 { > power-domains = <&zynqmp_firmware PD_GDMA>; > }; > > - fpd_dma_chan2: dma@fd510000 { > + fpd_dma_chan2: dma-controller@fd510000 { > status = "disabled"; > compatible = "xlnx,zynqmp-dma-1.0"; > reg = <0x0 0xfd510000 0x0 0x1000>; > @@ -280,7 +280,7 @@ fpd_dma_chan2: dma@fd510000 { > power-domains = <&zynqmp_firmware PD_GDMA>; > }; > > - fpd_dma_chan3: dma@fd520000 { > + fpd_dma_chan3: dma-controller@fd520000 { > status = "disabled"; > compatible = "xlnx,zynqmp-dma-1.0"; > reg = <0x0 0xfd520000 0x0 0x1000>; > @@ -293,7 +293,7 @@ fpd_dma_chan3: dma@fd520000 { > power-domains = <&zynqmp_firmware PD_GDMA>; > }; > > - fpd_dma_chan4: dma@fd530000 { > + fpd_dma_chan4: dma-controller@fd530000 { > status = "disabled"; > compatible = "xlnx,zynqmp-dma-1.0"; > reg = <0x0 0xfd530000 0x0 0x1000>; > @@ -306,7 +306,7 @@ fpd_dma_chan4: dma@fd530000 { > power-domains = <&zynqmp_firmware PD_GDMA>; > }; > > - fpd_dma_chan5: dma@fd540000 { > + fpd_dma_chan5: dma-controller@fd540000 { > status = "disabled"; > compatible = "xlnx,zynqmp-dma-1.0"; > reg = <0x0 0xfd540000 0x0 0x1000>; > @@ -319,7 +319,7 @@ fpd_dma_chan5: dma@fd540000 { > power-domains = <&zynqmp_firmware PD_GDMA>; > }; > > - fpd_dma_chan6: dma@fd550000 { > + fpd_dma_chan6: dma-controller@fd550000 { > status = "disabled"; > compatible = "xlnx,zynqmp-dma-1.0"; > reg = <0x0 0xfd550000 0x0 0x1000>; > @@ -332,7 +332,7 @@ fpd_dma_chan6: dma@fd550000 { > power-domains = <&zynqmp_firmware PD_GDMA>; > }; > > - fpd_dma_chan7: dma@fd560000 { > + fpd_dma_chan7: dma-controller@fd560000 { > status = "disabled"; > compatible = "xlnx,zynqmp-dma-1.0"; > reg = <0x0 0xfd560000 0x0 0x1000>; > @@ -345,7 +345,7 @@ fpd_dma_chan7: dma@fd560000 { > power-domains = <&zynqmp_firmware PD_GDMA>; > }; > > - fpd_dma_chan8: dma@fd570000 { > + fpd_dma_chan8: dma-controller@fd570000 { > status = "disabled"; > compatible = "xlnx,zynqmp-dma-1.0"; > reg = <0x0 0xfd570000 0x0 0x1000>; > @@ -375,7 +375,7 @@ gic: interrupt-controller@f9010000 { > * These dma channels, Users should ensure that these dma > * Channels are allowed for non secure access. > */ > - lpd_dma_chan1: dma@ffa80000 { > + lpd_dma_chan1: dma-controller@ffa80000 { > status = "disabled"; > compatible = "xlnx,zynqmp-dma-1.0"; > reg = <0x0 0xffa80000 0x0 0x1000>; > @@ -388,7 +388,7 @@ lpd_dma_chan1: dma@ffa80000 { > power-domains = <&zynqmp_firmware PD_ADMA>; > }; > > - lpd_dma_chan2: dma@ffa90000 { > + lpd_dma_chan2: dma-controller@ffa90000 { > status = "disabled"; > compatible = "xlnx,zynqmp-dma-1.0"; > reg = <0x0 0xffa90000 0x0 0x1000>; > @@ -401,7 +401,7 @@ lpd_dma_chan2: dma@ffa90000 { > power-domains = <&zynqmp_firmware PD_ADMA>; > }; > > - lpd_dma_chan3: dma@ffaa0000 { > + lpd_dma_chan3: dma-controller@ffaa0000 { > status = "disabled"; > compatible = "xlnx,zynqmp-dma-1.0"; > reg = <0x0 0xffaa0000 0x0 0x1000>; > @@ -414,7 +414,7 @@ lpd_dma_chan3: dma@ffaa0000 { > power-domains = <&zynqmp_firmware PD_ADMA>; > }; > > - lpd_dma_chan4: dma@ffab0000 { > + lpd_dma_chan4: dma-controller@ffab0000 { > status = "disabled"; > compatible = "xlnx,zynqmp-dma-1.0"; > reg = <0x0 0xffab0000 0x0 0x1000>; > @@ -427,7 +427,7 @@ lpd_dma_chan4: dma@ffab0000 { > power-domains = <&zynqmp_firmware PD_ADMA>; > }; > > - lpd_dma_chan5: dma@ffac0000 { > + lpd_dma_chan5: dma-controller@ffac0000 { > status = "disabled"; > compatible = "xlnx,zynqmp-dma-1.0"; > reg = <0x0 0xffac0000 0x0 0x1000>; > @@ -440,7 +440,7 @@ lpd_dma_chan5: dma@ffac0000 { > power-domains = <&zynqmp_firmware PD_ADMA>; > }; > > - lpd_dma_chan6: dma@ffad0000 { > + lpd_dma_chan6: dma-controller@ffad0000 { > status = "disabled"; > compatible = "xlnx,zynqmp-dma-1.0"; > reg = <0x0 0xffad0000 0x0 0x1000>; > @@ -453,7 +453,7 @@ lpd_dma_chan6: dma@ffad0000 { > power-domains = <&zynqmp_firmware PD_ADMA>; > }; > > - lpd_dma_chan7: dma@ffae0000 { > + lpd_dma_chan7: dma-controller@ffae0000 { > status = "disabled"; > compatible = "xlnx,zynqmp-dma-1.0"; > reg = <0x0 0xffae0000 0x0 0x1000>; > @@ -466,7 +466,7 @@ lpd_dma_chan7: dma@ffae0000 { > power-domains = <&zynqmp_firmware PD_ADMA>; > }; > > - lpd_dma_chan8: dma@ffaf0000 { > + lpd_dma_chan8: dma-controller@ffaf0000 { > status = "disabled"; > compatible = "xlnx,zynqmp-dma-1.0"; > reg = <0x0 0xffaf0000 0x0 0x1000>; Applied. M
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 6d96b6b99f84..3e15391e5b37 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -254,7 +254,7 @@ pmu@9000 { }; /* GDMA */ - fpd_dma_chan1: dma@fd500000 { + fpd_dma_chan1: dma-controller@fd500000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xfd500000 0x0 0x1000>; @@ -267,7 +267,7 @@ fpd_dma_chan1: dma@fd500000 { power-domains = <&zynqmp_firmware PD_GDMA>; }; - fpd_dma_chan2: dma@fd510000 { + fpd_dma_chan2: dma-controller@fd510000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xfd510000 0x0 0x1000>; @@ -280,7 +280,7 @@ fpd_dma_chan2: dma@fd510000 { power-domains = <&zynqmp_firmware PD_GDMA>; }; - fpd_dma_chan3: dma@fd520000 { + fpd_dma_chan3: dma-controller@fd520000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xfd520000 0x0 0x1000>; @@ -293,7 +293,7 @@ fpd_dma_chan3: dma@fd520000 { power-domains = <&zynqmp_firmware PD_GDMA>; }; - fpd_dma_chan4: dma@fd530000 { + fpd_dma_chan4: dma-controller@fd530000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xfd530000 0x0 0x1000>; @@ -306,7 +306,7 @@ fpd_dma_chan4: dma@fd530000 { power-domains = <&zynqmp_firmware PD_GDMA>; }; - fpd_dma_chan5: dma@fd540000 { + fpd_dma_chan5: dma-controller@fd540000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xfd540000 0x0 0x1000>; @@ -319,7 +319,7 @@ fpd_dma_chan5: dma@fd540000 { power-domains = <&zynqmp_firmware PD_GDMA>; }; - fpd_dma_chan6: dma@fd550000 { + fpd_dma_chan6: dma-controller@fd550000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xfd550000 0x0 0x1000>; @@ -332,7 +332,7 @@ fpd_dma_chan6: dma@fd550000 { power-domains = <&zynqmp_firmware PD_GDMA>; }; - fpd_dma_chan7: dma@fd560000 { + fpd_dma_chan7: dma-controller@fd560000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xfd560000 0x0 0x1000>; @@ -345,7 +345,7 @@ fpd_dma_chan7: dma@fd560000 { power-domains = <&zynqmp_firmware PD_GDMA>; }; - fpd_dma_chan8: dma@fd570000 { + fpd_dma_chan8: dma-controller@fd570000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xfd570000 0x0 0x1000>; @@ -375,7 +375,7 @@ gic: interrupt-controller@f9010000 { * These dma channels, Users should ensure that these dma * Channels are allowed for non secure access. */ - lpd_dma_chan1: dma@ffa80000 { + lpd_dma_chan1: dma-controller@ffa80000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xffa80000 0x0 0x1000>; @@ -388,7 +388,7 @@ lpd_dma_chan1: dma@ffa80000 { power-domains = <&zynqmp_firmware PD_ADMA>; }; - lpd_dma_chan2: dma@ffa90000 { + lpd_dma_chan2: dma-controller@ffa90000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xffa90000 0x0 0x1000>; @@ -401,7 +401,7 @@ lpd_dma_chan2: dma@ffa90000 { power-domains = <&zynqmp_firmware PD_ADMA>; }; - lpd_dma_chan3: dma@ffaa0000 { + lpd_dma_chan3: dma-controller@ffaa0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xffaa0000 0x0 0x1000>; @@ -414,7 +414,7 @@ lpd_dma_chan3: dma@ffaa0000 { power-domains = <&zynqmp_firmware PD_ADMA>; }; - lpd_dma_chan4: dma@ffab0000 { + lpd_dma_chan4: dma-controller@ffab0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xffab0000 0x0 0x1000>; @@ -427,7 +427,7 @@ lpd_dma_chan4: dma@ffab0000 { power-domains = <&zynqmp_firmware PD_ADMA>; }; - lpd_dma_chan5: dma@ffac0000 { + lpd_dma_chan5: dma-controller@ffac0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xffac0000 0x0 0x1000>; @@ -440,7 +440,7 @@ lpd_dma_chan5: dma@ffac0000 { power-domains = <&zynqmp_firmware PD_ADMA>; }; - lpd_dma_chan6: dma@ffad0000 { + lpd_dma_chan6: dma-controller@ffad0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xffad0000 0x0 0x1000>; @@ -453,7 +453,7 @@ lpd_dma_chan6: dma@ffad0000 { power-domains = <&zynqmp_firmware PD_ADMA>; }; - lpd_dma_chan7: dma@ffae0000 { + lpd_dma_chan7: dma-controller@ffae0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xffae0000 0x0 0x1000>; @@ -466,7 +466,7 @@ lpd_dma_chan7: dma@ffae0000 { power-domains = <&zynqmp_firmware PD_ADMA>; }; - lpd_dma_chan8: dma@ffaf0000 { + lpd_dma_chan8: dma-controller@ffaf0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; reg = <0x0 0xffaf0000 0x0 0x1000>;
The ZynqMP dma engines are actually dma-controllers as specified by the device tree binding. Rename the device tree nodes accordingly. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 32 +++++++++++++------------- 1 file changed, 16 insertions(+), 16 deletions(-)