From patchwork Fri Jan 21 19:35:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Romain Perier X-Patchwork-Id: 12720174 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6B743C433EF for ; Fri, 21 Jan 2022 19:38:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=6vD39w+51XSMPo3Ewt2sTEqNG6g1NMJdpfqFKyShc/0=; b=2/lWtX2KuF3JWJ Qc4Oat4KqiqZYE+XQKS2bafw1vEnZjUWbvhGiir51HO0IPHyF5Of1DyA7IDabgDDVrSaBQnpQhgPL pwcUuZInjetc0e6oJBE8AYyHaNVfGlXjj/ALfECGj2t8ERRxLre/P5EGRbfJ6UvSEWs5M+CNQmIQ7 Jypa4PO5GvYHPvCPgrqVmbrGhbGv9ldsaHyStxthL9taLwcZyT/v+mHraIJAfPc93RUhyWIf+h+kA a6TpjCeBPtr/Rlcm700gbPUFQ/4GM7/dTA6SBompdVQyS1BzhsNe6kZRuzC5kdms3jfKLbEhogIKL sqLbIWWB4b4QnUYInEXw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nAzit-00FwWa-LJ; Fri, 21 Jan 2022 19:37:23 +0000 Received: from mail-wm1-x331.google.com ([2a00:1450:4864:20::331]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nAzhW-00Fw3U-4O for linux-arm-kernel@lists.infradead.org; Fri, 21 Jan 2022 19:35:59 +0000 Received: by mail-wm1-x331.google.com with SMTP id j5-20020a05600c1c0500b0034d2e956aadso23373748wms.4 for ; Fri, 21 Jan 2022 11:35:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=21h9f/ui8ZIqSSrHzJ4KrN8YACvdlcc8m+OIu8z6NvM=; b=ChJ5C4kaaPI5FOo+yQV886VnzSu4zGeWDBiucW3jXXe/7bjC7nwsfRhhl4bKytkqKY 4+GOSQf6Rcb6PtJ9fpTMvGwk758DhPWsP+f3UhkZV3/i9jc7BUiEwYn58oDY/WzXyD0b EkGKdXAxxgFJ7ST/ZPZh8yvgwy+5h5fv6/aY0B8O+Kc9xlNMmmVHI/bAid4E5cZ9BQQt TLhFGobrz/vTKhFU2XOygjqhSwBQ5pSgdWRpY5BuP84uqlYtn2BJeVJd+0d56vpYVXaa +KsRwxhGYZEOGXsryPxJ/fk0J6f260RmmQFw0X1rik8zDcRhccTR7J8LzeE47h1Alqty cRuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=21h9f/ui8ZIqSSrHzJ4KrN8YACvdlcc8m+OIu8z6NvM=; b=hLfCaIkj5glYwP6YGSc8yKAZsp1Ly0yUXlsiqCbPF/o++07Nty91geNZG3IPt2LUnV OtDQ9Z2YgIk5/+SZv2el9xRQsZfzP/uvO4/Q4stJRKJSBJ4KFN0SrGgw7FOQPw5SKXXz BnaxC9Jqtifw1+89Y029GUiW8qrK/xV3ogMmuY0XBIpd38S0bn+rrSLx5eaDIg2LMr18 gPcoW0EWIVdBWrG9GLqsSE23aAngdnIicwYP44ygQErPKZ7E7nNDNV/MfQBUNWhgILUv p9NBv5IRTRg4wi0DrvkQiaXRCNT+0vFkVP7yyV2MNGmKPN0mWlTBhs0eR9JnXnVPcwgn a+qQ== X-Gm-Message-State: AOAM533q9M2gNrK6YnqZohsRdPDmkuect6gjApxtTtidAYg+IuozSuqF 6M+zqfcWHfcN99VFSD2rckA= X-Google-Smtp-Source: ABdhPJyF6mhUKvyKvBtUdyPCx+PCcxt329Pk0xVJAVdoo7pJZUxMrUv2vevCHFg3ydT1rwgY2vKS/Q== X-Received: by 2002:a05:600c:1da2:: with SMTP id p34mr1987262wms.97.1642793756985; Fri, 21 Jan 2022 11:35:56 -0800 (PST) Received: from debby ([2a01:e0a:a6d:a8d0:7ff4:8f61:5574:9f95]) by smtp.gmail.com with ESMTPSA id p19sm6213407wmq.19.2022.01.21.11.35.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Jan 2022 11:35:56 -0800 (PST) From: Romain Perier To: Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org, Arnd Bergmann , Daniel Palmer , Romain Perier , Rob Herring Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Willy Tarreau Subject: [PATCH v3 7/9] ARM: mstar: Add OPP table for infinity3 Date: Fri, 21 Jan 2022 20:35:42 +0100 Message-Id: <20220121193544.23231-8-romain.perier@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220121193544.23231-1-romain.perier@gmail.com> References: <20220121193544.23231-1-romain.perier@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220121_113558_201032_0227E1BC X-CRM114-Status: GOOD ( 11.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Daniel Palmer The infinity3 has a slightly higher max frequency compared to the infinity so extend the OPP table. Co-authored-by: Willy Tarreau Signed-off-by: Daniel Palmer --- arch/arm/boot/dts/mstar-infinity3.dtsi | 58 ++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/arch/arm/boot/dts/mstar-infinity3.dtsi b/arch/arm/boot/dts/mstar-infinity3.dtsi index 9857e2a9934d..a56cf29e5d82 100644 --- a/arch/arm/boot/dts/mstar-infinity3.dtsi +++ b/arch/arm/boot/dts/mstar-infinity3.dtsi @@ -6,6 +6,64 @@ #include "mstar-infinity.dtsi" +&cpu0_opp_table { + opp-1008000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + }; + + // overclock frequencies below, shown to work fine up to 1.3 GHz + opp-108000000 { + opp-hz = /bits/ 64 <1080000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; + + opp-1188000000 { + opp-hz = /bits/ 64 <1188000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; + + opp-1296000000 { + opp-hz = /bits/ 64 <1296000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; + + opp-1350000000 { + opp-hz = /bits/ 64 <1350000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; + + opp-1404000000 { + opp-hz = /bits/ 64 <1404000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; + + opp-1458000000 { + opp-hz = /bits/ 64 <1458000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; + + opp-1512000000 { + opp-hz = /bits/ 64 <1512000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; +}; + &imi { reg = <0xa0000000 0x20000>; };