diff mbox series

arm64/mte: Clarify mode reported by PR_GET_TAGGED_ADDR_CTRL

Message ID 20220127190324.660405-1-broonie@kernel.org (mailing list archive)
State New, archived
Headers show
Series arm64/mte: Clarify mode reported by PR_GET_TAGGED_ADDR_CTRL | expand

Commit Message

Mark Brown Jan. 27, 2022, 7:03 p.m. UTC
With the current wording readers might infer that PR_GET_TAGGED_ADDR_CTRL
will report the mode currently active in the thread however this is not the
actual behaviour, instead all modes currently selected by the process will
be reported with the mode used depending on the combination of the
requested modes and the default set for the current CPU. This has been the
case since 433c38f40f6a81 ("arm64: mte: change ASYNC and SYNC TCF settings
into bitfields"), before that we did not allow more than one mode to be
requested simultaneously.

Update the documentation to more clearly reflect current behaviour.

Signed-off-by: Mark Brown <broonie@kernel.org>
---
 Documentation/arm64/memory-tagging-extension.rst | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

Comments

Catalin Marinas Feb. 1, 2022, 6:31 p.m. UTC | #1
On Thu, Jan 27, 2022 at 07:03:23PM +0000, Mark Brown wrote:
> With the current wording readers might infer that PR_GET_TAGGED_ADDR_CTRL
> will report the mode currently active in the thread however this is not the
> actual behaviour, instead all modes currently selected by the process will
> be reported with the mode used depending on the combination of the
> requested modes and the default set for the current CPU. This has been the
> case since 433c38f40f6a81 ("arm64: mte: change ASYNC and SYNC TCF settings
> into bitfields"), before that we did not allow more than one mode to be
> requested simultaneously.
> 
> Update the documentation to more clearly reflect current behaviour.
> 
> Signed-off-by: Mark Brown <broonie@kernel.org>

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Will Deacon Feb. 15, 2022, 11:18 p.m. UTC | #2
On Thu, 27 Jan 2022 19:03:23 +0000, Mark Brown wrote:
> With the current wording readers might infer that PR_GET_TAGGED_ADDR_CTRL
> will report the mode currently active in the thread however this is not the
> actual behaviour, instead all modes currently selected by the process will
> be reported with the mode used depending on the combination of the
> requested modes and the default set for the current CPU. This has been the
> case since 433c38f40f6a81 ("arm64: mte: change ASYNC and SYNC TCF settings
> into bitfields"), before that we did not allow more than one mode to be
> requested simultaneously.
> 
> [...]

Applied to arm64 (for-next/docs), thanks!

[1/1] arm64/mte: Clarify mode reported by PR_GET_TAGGED_ADDR_CTRL
      https://git.kernel.org/arm64/c/4c022f57ad95

Cheers,
diff mbox series

Patch

diff --git a/Documentation/arm64/memory-tagging-extension.rst b/Documentation/arm64/memory-tagging-extension.rst
index 7b99c8f428eb..a0ab2f65b235 100644
--- a/Documentation/arm64/memory-tagging-extension.rst
+++ b/Documentation/arm64/memory-tagging-extension.rst
@@ -91,8 +91,9 @@  mode is specified, the program will run in that mode. If multiple
 modes are specified, the mode is selected as described in the "Per-CPU
 preferred tag checking modes" section below.
 
-The current tag check fault mode can be read using the
-``prctl(PR_GET_TAGGED_ADDR_CTRL, 0, 0, 0, 0)`` system call.
+The current tag check fault configuration can be read using the
+``prctl(PR_GET_TAGGED_ADDR_CTRL, 0, 0, 0, 0)`` system call. If
+multiple modes were requested then all will be reported.
 
 Tag checking can also be disabled for a user thread by setting the
 ``PSTATE.TCO`` bit with ``MSR TCO, #1``.