| Message ID | 20220127195712.748150-2-broonie@kernel.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64/mte: Asymmetric MTE support in userspace | expand |
On Thu, Jan 27, 2022 at 07:57:09PM +0000, Mark Brown wrote: > MTE3 adds a new mode which is synchronous for writes but asynchronous for > reads. It's the other way around: synchronous for reads, async for writes. You got it correctly in the doc. > Document the userspace ABI for this feature, we call the new mode > ASYMM and add a new prctl flag and mte_tcf_preferred value for it. > > Signed-off-by: Mark Brown <broonie@kernel.org> > --- > Documentation/arm64/memory-tagging-extension.rst | 12 +++++++----- > 1 file changed, 7 insertions(+), 5 deletions(-) > > diff --git a/Documentation/arm64/memory-tagging-extension.rst b/Documentation/arm64/memory-tagging-extension.rst > index 7b99c8f428eb..5218b838d062 100644 > --- a/Documentation/arm64/memory-tagging-extension.rst > +++ b/Documentation/arm64/memory-tagging-extension.rst > @@ -76,6 +76,9 @@ configurable behaviours: > with ``.si_code = SEGV_MTEAERR`` and ``.si_addr = 0`` (the faulting > address is unknown). > > +- *Asymmetric* - Reads are handled as for synchronous mode while writes > + are handled as for asynchronous mode. That's correct. > + > The user can select the above modes, per thread, using the > ``prctl(PR_SET_TAGGED_ADDR_CTRL, flags, 0, 0, 0)`` system call where ``flags`` > contains any number of the following values in the ``PR_MTE_TCF_MASK`` > @@ -85,6 +88,7 @@ bit-field: > (ignored if combined with other options) > - ``PR_MTE_TCF_SYNC`` - *Synchronous* tag check fault mode > - ``PR_MTE_TCF_ASYNC`` - *Asynchronous* tag check fault mode > +- ``PR_MTE_TCF_ASYMM`` - *Asymmetric* tag check fault mode > > If no modes are specified, tag check faults are ignored. If a single > mode is specified, the program will run in that mode. If multiple > @@ -139,16 +143,14 @@ tag checking mode as the CPU's preferred tag checking mode. > > The preferred tag checking mode for each CPU is controlled by > ``/sys/devices/system/cpu/cpu<N>/mte_tcf_preferred``, to which a > -privileged user may write the value ``async`` or ``sync``. The default > -preferred mode for each CPU is ``async``. > +privileged user may write the value ``async``, ``sync`` or ``asymm``. The > +default preferred mode for each CPU is ``async``. That's fine by me. It can be configured at boot for each CPU. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Hi Mark, On 1/27/22 7:57 PM, Mark Brown wrote: > MTE3 adds a new mode which is synchronous for writes but asynchronous for > reads. MTE3 (Asymmetric Mode) is synchronous for reads and asynchronous for writes. > Document the userspace ABI for this feature, we call the new mode > ASYMM and add a new prctl flag and mte_tcf_preferred value for it. > > Signed-off-by: Mark Brown <broonie@kernel.org> A part that: Reviewed-by: Vincenzo Frascino <Vincenzo.Frascino@arm.com> > --- > Documentation/arm64/memory-tagging-extension.rst | 12 +++++++----- > 1 file changed, 7 insertions(+), 5 deletions(-) > > diff --git a/Documentation/arm64/memory-tagging-extension.rst b/Documentation/arm64/memory-tagging-extension.rst > index 7b99c8f428eb..5218b838d062 100644 > --- a/Documentation/arm64/memory-tagging-extension.rst > +++ b/Documentation/arm64/memory-tagging-extension.rst > @@ -76,6 +76,9 @@ configurable behaviours: > with ``.si_code = SEGV_MTEAERR`` and ``.si_addr = 0`` (the faulting > address is unknown). > > +- *Asymmetric* - Reads are handled as for synchronous mode while writes > + are handled as for asynchronous mode. > + > The user can select the above modes, per thread, using the > ``prctl(PR_SET_TAGGED_ADDR_CTRL, flags, 0, 0, 0)`` system call where ``flags`` > contains any number of the following values in the ``PR_MTE_TCF_MASK`` > @@ -85,6 +88,7 @@ bit-field: > (ignored if combined with other options) > - ``PR_MTE_TCF_SYNC`` - *Synchronous* tag check fault mode > - ``PR_MTE_TCF_ASYNC`` - *Asynchronous* tag check fault mode > +- ``PR_MTE_TCF_ASYMM`` - *Asymmetric* tag check fault mode > > If no modes are specified, tag check faults are ignored. If a single > mode is specified, the program will run in that mode. If multiple > @@ -139,16 +143,14 @@ tag checking mode as the CPU's preferred tag checking mode. > > The preferred tag checking mode for each CPU is controlled by > ``/sys/devices/system/cpu/cpu<N>/mte_tcf_preferred``, to which a > -privileged user may write the value ``async`` or ``sync``. The default > -preferred mode for each CPU is ``async``. > +privileged user may write the value ``async``, ``sync`` or ``asymm``. The > +default preferred mode for each CPU is ``async``. > > To allow a program to potentially run in the CPU's preferred tag > checking mode, the user program may set multiple tag check fault mode > bits in the ``flags`` argument to the ``prctl(PR_SET_TAGGED_ADDR_CTRL, > flags, 0, 0, 0)`` system call. If the CPU's preferred tag checking > -mode is in the task's set of provided tag checking modes (this will > -always be the case at present because the kernel only supports two > -tag checking modes, but future kernels may support more modes), that > +mode is in the task's set of provided tag checking modes, that > mode will be selected. Otherwise, one of the modes in the task's mode > set will be selected in a currently unspecified manner. > >
On Fri, Jan 28, 2022 at 04:43:21PM +0000, Catalin Marinas wrote: > On Thu, Jan 27, 2022 at 07:57:09PM +0000, Mark Brown wrote: > > MTE3 adds a new mode which is synchronous for writes but asynchronous for > > reads. > It's the other way around: synchronous for reads, async for writes. You > got it correctly in the doc. Doh. See, I know that the way to get fast review is to make some obvious error which someone can point out :P > > The preferred tag checking mode for each CPU is controlled by > > ``/sys/devices/system/cpu/cpu<N>/mte_tcf_preferred``, to which a > > -privileged user may write the value ``async`` or ``sync``. The default > > -preferred mode for each CPU is ``async``. > > +privileged user may write the value ``async``, ``sync`` or ``asymm``. The > > +default preferred mode for each CPU is ``async``. > > That's fine by me. It can be configured at boot for each CPU. > > Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
On Thu, Jan 27, 2022 at 07:57:09PM +0000, Mark Brown wrote: > MTE3 adds a new mode which is synchronous for writes but asynchronous for > reads. Document the userspace ABI for this feature, we call the new mode > ASYMM and add a new prctl flag and mte_tcf_preferred value for it. > > Signed-off-by: Mark Brown <broonie@kernel.org> > --- > Documentation/arm64/memory-tagging-extension.rst | 12 +++++++----- > 1 file changed, 7 insertions(+), 5 deletions(-) > > diff --git a/Documentation/arm64/memory-tagging-extension.rst b/Documentation/arm64/memory-tagging-extension.rst > index 7b99c8f428eb..5218b838d062 100644 > --- a/Documentation/arm64/memory-tagging-extension.rst > +++ b/Documentation/arm64/memory-tagging-extension.rst > @@ -76,6 +76,9 @@ configurable behaviours: > with ``.si_code = SEGV_MTEAERR`` and ``.si_addr = 0`` (the faulting > address is unknown). > > +- *Asymmetric* - Reads are handled as for synchronous mode while writes > + are handled as for asynchronous mode. > + > The user can select the above modes, per thread, using the > ``prctl(PR_SET_TAGGED_ADDR_CTRL, flags, 0, 0, 0)`` system call where ``flags`` > contains any number of the following values in the ``PR_MTE_TCF_MASK`` > @@ -85,6 +88,7 @@ bit-field: > (ignored if combined with other options) > - ``PR_MTE_TCF_SYNC`` - *Synchronous* tag check fault mode > - ``PR_MTE_TCF_ASYNC`` - *Asynchronous* tag check fault mode > +- ``PR_MTE_TCF_ASYMM`` - *Asymmetric* tag check fault mode > > If no modes are specified, tag check faults are ignored. If a single > mode is specified, the program will run in that mode. If multiple > @@ -139,16 +143,14 @@ tag checking mode as the CPU's preferred tag checking mode. > > The preferred tag checking mode for each CPU is controlled by > ``/sys/devices/system/cpu/cpu<N>/mte_tcf_preferred``, to which a > -privileged user may write the value ``async`` or ``sync``. The default > -preferred mode for each CPU is ``async``. > +privileged user may write the value ``async``, ``sync`` or ``asymm``. The > +default preferred mode for each CPU is ``async``. > > To allow a program to potentially run in the CPU's preferred tag > checking mode, the user program may set multiple tag check fault mode > bits in the ``flags`` argument to the ``prctl(PR_SET_TAGGED_ADDR_CTRL, > flags, 0, 0, 0)`` system call. If the CPU's preferred tag checking > -mode is in the task's set of provided tag checking modes (this will > -always be the case at present because the kernel only supports two > -tag checking modes, but future kernels may support more modes), that > +mode is in the task's set of provided tag checking modes, that > mode will be selected. Otherwise, one of the modes in the task's mode > set will be selected in a currently unspecified manner. I think it's time we specified the "unspecified manner" now that we have three options. Will
On Tue, Feb 15, 2022 at 06:14:23PM +0000, Will Deacon wrote: > On Thu, Jan 27, 2022 at 07:57:09PM +0000, Mark Brown wrote: > > mode will be selected. Otherwise, one of the modes in the task's mode > > set will be selected in a currently unspecified manner. > I think it's time we specified the "unspecified manner" now that we have > three options. Are you happy with the manner that is implemented in the patch set or is this purely a request for documenation?
On Wed, Feb 16, 2022 at 04:36:22PM +0000, Mark Brown wrote: > On Tue, Feb 15, 2022 at 06:14:23PM +0000, Will Deacon wrote: > > On Thu, Jan 27, 2022 at 07:57:09PM +0000, Mark Brown wrote: > > > > mode will be selected. Otherwise, one of the modes in the task's mode > > > set will be selected in a currently unspecified manner. > > > I think it's time we specified the "unspecified manner" now that we have > > three options. > > Are you happy with the manner that is implemented in the patch set or is > this purely a request for documenation? Sorry, yes, I'm just saying let's document what the code does, as that is what people will end up relying on. Will
diff --git a/Documentation/arm64/memory-tagging-extension.rst b/Documentation/arm64/memory-tagging-extension.rst index 7b99c8f428eb..5218b838d062 100644 --- a/Documentation/arm64/memory-tagging-extension.rst +++ b/Documentation/arm64/memory-tagging-extension.rst @@ -76,6 +76,9 @@ configurable behaviours: with ``.si_code = SEGV_MTEAERR`` and ``.si_addr = 0`` (the faulting address is unknown). +- *Asymmetric* - Reads are handled as for synchronous mode while writes + are handled as for asynchronous mode. + The user can select the above modes, per thread, using the ``prctl(PR_SET_TAGGED_ADDR_CTRL, flags, 0, 0, 0)`` system call where ``flags`` contains any number of the following values in the ``PR_MTE_TCF_MASK`` @@ -85,6 +88,7 @@ bit-field: (ignored if combined with other options) - ``PR_MTE_TCF_SYNC`` - *Synchronous* tag check fault mode - ``PR_MTE_TCF_ASYNC`` - *Asynchronous* tag check fault mode +- ``PR_MTE_TCF_ASYMM`` - *Asymmetric* tag check fault mode If no modes are specified, tag check faults are ignored. If a single mode is specified, the program will run in that mode. If multiple @@ -139,16 +143,14 @@ tag checking mode as the CPU's preferred tag checking mode. The preferred tag checking mode for each CPU is controlled by ``/sys/devices/system/cpu/cpu<N>/mte_tcf_preferred``, to which a -privileged user may write the value ``async`` or ``sync``. The default -preferred mode for each CPU is ``async``. +privileged user may write the value ``async``, ``sync`` or ``asymm``. The +default preferred mode for each CPU is ``async``. To allow a program to potentially run in the CPU's preferred tag checking mode, the user program may set multiple tag check fault mode bits in the ``flags`` argument to the ``prctl(PR_SET_TAGGED_ADDR_CTRL, flags, 0, 0, 0)`` system call. If the CPU's preferred tag checking -mode is in the task's set of provided tag checking modes (this will -always be the case at present because the kernel only supports two -tag checking modes, but future kernels may support more modes), that +mode is in the task's set of provided tag checking modes, that mode will be selected. Otherwise, one of the modes in the task's mode set will be selected in a currently unspecified manner.
MTE3 adds a new mode which is synchronous for writes but asynchronous for reads. Document the userspace ABI for this feature, we call the new mode ASYMM and add a new prctl flag and mte_tcf_preferred value for it. Signed-off-by: Mark Brown <broonie@kernel.org> --- Documentation/arm64/memory-tagging-extension.rst | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-)