From patchwork Thu Feb 3 17:41:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Upton X-Patchwork-Id: 12734483 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 94321C433F5 for ; Thu, 3 Feb 2022 17:46:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:References: Mime-Version:Message-Id:In-Reply-To:Date:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=ygFdVZxgvKWFzKfObxi4P2fqCDQfmf4J1A8SaJ58AGw=; b=xhwLU6Nr3XKCcAd8wjzqzjiAQ6 z2KduAh1nMSa5NeablvqElBu3eIyK7FZJsDBuYrU2ZojVxDo3SEuM0NFesWqXNfDFvHkPv6DWulcl qK6HGVdSWk8cetKXSjBlEmdzYrpv1/VCY538wUavuYpyeYNLxR8ARa4vMkUXPY6U3s8ZBI3As2Lcx 1Ij3XVikEx4WPWS9W8JQ1zIjN7wIXWHtU1kf90ryoyEPsVdosVSaZWh/7nuEKy17zWXie+siAM2DW yxmqp0tiqFtxDm53eZfwpSUFpPJiHRQszM4B16WWjf6HomaRyq5xL1MB3qi2IQlbU8CkbZrHoJ17V EagAwMAw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nFgA8-002JHC-Co; Thu, 03 Feb 2022 17:44:54 +0000 Received: from mail-oo1-xc49.google.com ([2607:f8b0:4864:20::c49]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nFg7U-002IGk-JY for linux-arm-kernel@lists.infradead.org; Thu, 03 Feb 2022 17:42:11 +0000 Received: by mail-oo1-xc49.google.com with SMTP id g2-20020a4a9242000000b002da7c459222so2023327ooh.13 for ; Thu, 03 Feb 2022 09:42:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=4r0SOCWPt5wKx9CF8jZGU5LRHrjPyjKnyg/twxUQ99U=; b=WGfV40wvKZIU47t0pOoO5Ect/ooh/k+M7Cw6D4v4PpUlSOKP2FwOHEGVYONx6nGhFu mDHr/OM6Rdc09lcwS2cWOiwbvKPWoiF9BSba/1uh3PQsRUM5nqWX3LDzBHUaCCjDuWQ1 YNAAigy48uvL8v1HAa9CT/S0GHAyWUMgmlOORwpinqt4djULKhls70VGihjrC8KkFRkQ UFAlTt0N368uTzsFGbVHTfwtLm0EZ8H4nyC1zZa9eKBQlQQnBFxdaih58yPTHd60dMj2 RfIhwE0I/CnkSytY9p6WYOmRVlI27AbhdjTyNO/zP9PXDu7iigNQo7IsNzAZQudlGRur OMvw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=4r0SOCWPt5wKx9CF8jZGU5LRHrjPyjKnyg/twxUQ99U=; b=jBVehFWw02GOt7ms/ZMm/ug9pja2SVUcg1DtqPubPFYFYSJ+zWV8377+tEBDTYbiTu yETHLT2+QQHmdW31bBLf/oYgGNlv3LUJw85M0pUQY0MuBL0LVbta59M2Vp85B8HuoAFy xZKjzjMU5mRcHrMjHP6EIlg6XgP85KOu8TsCXM99MU+uu1P/IW8QaUxI/JZPvWN1XHd+ sciEhGdCtlSSFda7amhDfkp7qPWOJIpNYoDjrpRZ4dve7g337tSGZ1onAoM5C3BpNMJW 0F8xp6DS1VQ/iC1Ii3tRTBqq+53dl/ghwnFHqlQ7Gve6csV6fGLFWAaYcVS37/ZF09Sj 2reA== X-Gm-Message-State: AOAM531/4agHHG0Oqs3Spnj48tjKmVpm0ob5tEamXjGI7pbut+j72tYX dJeTejcDWOA+ipAe5bkouJvXBbU4wck= X-Google-Smtp-Source: ABdhPJxrLATr32R3AP4ZJY+RhNzt4B+T3nXZBmmd/mTtPyPFp/J8N73If4L4WfmS23RqXFjtJKk7h1BtLA0= X-Received: from oupton.c.googlers.com ([fda3:e722:ac3:cc00:2b:ff92:c0a8:404]) (user=oupton job=sendgmr) by 2002:a9d:57c6:: with SMTP id q6mr19955651oti.328.1643910126087; Thu, 03 Feb 2022 09:42:06 -0800 (PST) Date: Thu, 3 Feb 2022 17:41:56 +0000 In-Reply-To: <20220203174159.2887882-1-oupton@google.com> Message-Id: <20220203174159.2887882-4-oupton@google.com> Mime-Version: 1.0 References: <20220203174159.2887882-1-oupton@google.com> X-Mailer: git-send-email 2.35.0.263.gb82422642f-goog Subject: [PATCH v5 3/6] KVM: arm64: Allow guest to set the OSLK bit From: Oliver Upton To: kvmarm@lists.cs.columbia.edu Cc: kvm@vger.kernel.org, Marc Zyngier , James Morse , Alexandru Elisei , Suzuki K Poulose , linux-arm-kernel@lists.infradead.org, Andrew Jones , Peter Shier , Ricardo Koller , Reiji Watanabe , Mark Rutland , Oliver Upton X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220203_094208_699511_5814117D X-CRM114-Status: GOOD ( 17.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Allow writes to OSLAR and forward the OSLK bit to OSLSR. Do nothing with the value for now. Reviewed-by: Reiji Watanabe Signed-off-by: Oliver Upton --- arch/arm64/include/asm/sysreg.h | 3 +++ arch/arm64/kvm/sys_regs.c | 37 ++++++++++++++++++++++++++------- 2 files changed, 33 insertions(+), 7 deletions(-) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index abc85eaa453d..906a3550fc50 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -128,12 +128,15 @@ #define SYS_DBGWVRn_EL1(n) sys_reg(2, 0, 0, n, 6) #define SYS_DBGWCRn_EL1(n) sys_reg(2, 0, 0, n, 7) #define SYS_MDRAR_EL1 sys_reg(2, 0, 1, 0, 0) + #define SYS_OSLAR_EL1 sys_reg(2, 0, 1, 0, 4) +#define SYS_OSLAR_OSLK BIT(0) #define SYS_OSLSR_EL1 sys_reg(2, 0, 1, 1, 4) #define SYS_OSLSR_OSLM_MASK (BIT(3) | BIT(0)) #define SYS_OSLSR_OSLM_NI 0 #define SYS_OSLSR_OSLM_IMPLEMENTED BIT(3) +#define SYS_OSLSR_OSLK BIT(1) #define SYS_OSDLR_EL1 sys_reg(2, 0, 1, 3, 4) #define SYS_DBGPRCR_EL1 sys_reg(2, 0, 1, 4, 4) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index b8286c31e01c..b0d7240ef49f 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -44,6 +44,10 @@ * 64bit interface. */ +static int reg_from_user(u64 *val, const void __user *uaddr, u64 id); +static int reg_to_user(void __user *uaddr, const u64 *val, u64 id); +static u64 sys_reg_to_index(const struct sys_reg_desc *reg); + static bool read_from_write_only(struct kvm_vcpu *vcpu, struct sys_reg_params *params, const struct sys_reg_desc *r) @@ -287,6 +291,24 @@ static bool trap_loregion(struct kvm_vcpu *vcpu, return trap_raz_wi(vcpu, p, r); } +static bool trap_oslar_el1(struct kvm_vcpu *vcpu, + struct sys_reg_params *p, + const struct sys_reg_desc *r) +{ + u64 oslsr; + + if (!p->is_write) + return read_from_write_only(vcpu, p, r); + + /* Forward the OSLK bit to OSLSR */ + oslsr = __vcpu_sys_reg(vcpu, OSLSR_EL1) & ~SYS_OSLSR_OSLK; + if (p->regval & SYS_OSLAR_OSLK) + oslsr |= SYS_OSLSR_OSLK; + + __vcpu_sys_reg(vcpu, OSLSR_EL1) = oslsr; + return true; +} + static bool trap_oslsr_el1(struct kvm_vcpu *vcpu, struct sys_reg_params *p, const struct sys_reg_desc *r) @@ -309,9 +331,14 @@ static int set_oslsr_el1(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, if (err) return err; - if (val != rd->val) + /* + * The only modifiable bit is the OSLK bit. Refuse the write if + * userspace attempts to change any other bit in the register. + */ + if ((val ^ rd->val) & ~SYS_OSLSR_OSLK) return -EINVAL; + __vcpu_sys_reg(vcpu, rd->reg) = val; return 0; } @@ -1180,10 +1207,6 @@ static bool access_raz_id_reg(struct kvm_vcpu *vcpu, return __access_id_reg(vcpu, p, r, true); } -static int reg_from_user(u64 *val, const void __user *uaddr, u64 id); -static int reg_to_user(void __user *uaddr, const u64 *val, u64 id); -static u64 sys_reg_to_index(const struct sys_reg_desc *reg); - /* Visibility overrides for SVE-specific control registers */ static unsigned int sve_visibility(const struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd) @@ -1463,7 +1486,7 @@ static const struct sys_reg_desc sys_reg_descs[] = { DBG_BCR_BVR_WCR_WVR_EL1(15), { SYS_DESC(SYS_MDRAR_EL1), trap_raz_wi }, - { SYS_DESC(SYS_OSLAR_EL1), trap_raz_wi }, + { SYS_DESC(SYS_OSLAR_EL1), trap_oslar_el1 }, { SYS_DESC(SYS_OSLSR_EL1), trap_oslsr_el1, reset_val, OSLSR_EL1, SYS_OSLSR_OSLM_IMPLEMENTED, .set_user = set_oslsr_el1, }, { SYS_DESC(SYS_OSDLR_EL1), trap_raz_wi }, @@ -1937,7 +1960,7 @@ static const struct sys_reg_desc cp14_regs[] = { DBGBXVR(0), /* DBGOSLAR */ - { Op1( 0), CRn( 1), CRm( 0), Op2( 4), trap_raz_wi }, + { Op1( 0), CRn( 1), CRm( 0), Op2( 4), trap_oslar_el1 }, DBGBXVR(1), /* DBGOSLSR */ { Op1( 0), CRn( 1), CRm( 1), Op2( 4), trap_oslsr_el1, NULL, OSLSR_EL1 },