diff mbox series

[1/2] dt-bindings: pinctrl: pinctrl-microchip-sgpio: Fix example

Message ID 20220204153535.465827-2-horatiu.vultur@microchip.com (mailing list archive)
State New, archived
Headers show
Series pinctrl: pinctrl-microchip-sgpio: Fixes for irqs | expand

Commit Message

Horatiu Vultur Feb. 4, 2022, 3:35 p.m. UTC
The blamed commit adds support for irq, but the reqisters for irq are
outside of the memory size. They are at address 0x108. Therefore update
the memory size to cover all the registers used by the device.

Fixes: 01a9350bdd49fb ("dt-bindings: pinctrl: pinctrl-microchip-sgpio: Add irq support")
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
---
 .../devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml     | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Linus Walleij Feb. 11, 2022, 12:40 a.m. UTC | #1
On Fri, Feb 4, 2022 at 4:33 PM Horatiu Vultur
<horatiu.vultur@microchip.com> wrote:

> The blamed commit adds support for irq, but the reqisters for irq are
> outside of the memory size. They are at address 0x108. Therefore update
> the memory size to cover all the registers used by the device.
>
> Fixes: 01a9350bdd49fb ("dt-bindings: pinctrl: pinctrl-microchip-sgpio: Add irq support")
> Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>

This patch (1) applied to the pinctrl tree.

Yours,
Linus Walleij
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml b/Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml
index cb554084bdf1..0df4e114fdd6 100644
--- a/Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml
@@ -145,7 +145,7 @@  examples:
       clocks = <&sys_clk>;
       pinctrl-0 = <&sgpio2_pins>;
       pinctrl-names = "default";
-      reg = <0x1101059c 0x100>;
+      reg = <0x1101059c 0x118>;
       microchip,sgpio-port-ranges = <0 0>, <16 18>, <28 31>;
       bus-frequency = <25000000>;
       sgpio_in2: gpio@0 {