From patchwork Tue Feb 8 10:56:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 12738481 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3DC7CC433F5 for ; Tue, 8 Feb 2022 10:58:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=6SJt+idEyd/Mlg9inI3xsWdIrmTL4vepX056Vo9gzsU=; b=XdhGiX1y7Wmxel U4N6jtmQQvL+1cil64FqvnfT7MmIA4710HfK3tJW+xokS4blHfIzi0ttnuiVRWP6EcjuOlxfclP5O CV9uhPBKPx22A12akI+FRSQgibHxE0KImPUksgkTBC+hM8MLeMra6jDPqyurFN6Rf1Fe1JUhYbe2W b2RA28zDCT2FfiM8oL8q6A92fWdhk2V2m0pIubwOloeA3jDqiwYBQsMwdS5otlspbsTKkZvu4NGgU 7Dvo4MtCRm8TEDuOEmhilfCbaBMOujBcUS1bhJUc9/DkjPfViWqLCBOMPWQUJoWXYDu/Iscm3oiwD SAzMgP6DKEGweGC8/6Dg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nHOB6-00DUNT-4A; Tue, 08 Feb 2022 10:56:56 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nHOB2-00DUMi-HH for linux-arm-kernel@lists.infradead.org; Tue, 08 Feb 2022 10:56:53 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1644317812; x=1675853812; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=S8axRtcfBJDRvXNJoMKcZltsyqp7OihG7CRGPeue6xM=; b=e/ryt5cb2YaVsIqdf1Fz2gSMPoMTRETiKsf0viY2md9uvUddwHjMjrrc 3Dz3/G1K3g0JwbctMgKcFMM/+bYJHbgwWF+nJPh4x54vJU64GhjPn0umv YbWZ+gj/LBUlo2CLJ99V9TkcFZh20pax7NIox0kFg7y1JfhtBrqt0vEpW 7Re3yqZQ04a5wQzQwSzDVihelD3NBFEktE/yJQM5ZwVSe15HORKyTf9wX OTgwSU5WkVCtB1i3P1d+8xZ31zhDDNQBEfElBJKrb174sjDcIIh6GktJB foDlIAHA2cXybfzbJJvzqC7iOpM3/1Jcafo+VNjhoxxx0EHjdKym2ivji g==; IronPort-SDR: oSZWL6gLyBR6i8c3UCQUQLO7+q7dHOhWWtbftQ55vQWnLds4v3IrbiQpDSqKTexzGCtZT6OM1m nwTAnKwL2WoXiwfrkdMDdmsRuJuOBbLJcMhGcRuW730KtEljnP8ElYD9uzEFHTRuXhsrCUCoAY yS0ldRmNbq/+QJ1uB62gwfCVcwvcMjjN11KZ5vPeNeiiJSihwKx5jr2d7K/FW4FNsnC5xQdafP ijK5WedzkRo75uV9/oWk0lm0mRx2GFmiAm521L9TamlVu6/bHqKPxvWDe5CWB3Zxi2W95d1Hih 2PX2EfVxWt4+6YvlsAf0PNy+ X-IronPort-AV: E=Sophos;i="5.88,352,1635231600"; d="scan'208";a="85018576" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 08 Feb 2022 03:56:51 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Tue, 8 Feb 2022 03:56:51 -0700 Received: from ROB-ULT-M18064N.mchp-main.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Tue, 8 Feb 2022 03:56:48 -0700 From: Tudor Ambarus To: , , CC: , , , , , Tudor Ambarus Subject: [PATCH v4] ARM: dts: at91: sama7g5: Add crypto nodes Date: Tue, 8 Feb 2022 12:56:46 +0200 Message-ID: <20220208105646.226623-1-tudor.ambarus@microchip.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220208_025652_680757_F04FD80E X-CRM114-Status: UNSURE ( 9.41 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Describe and enable the AES, SHA and TDES crypto IPs. Tested with the extra run-time self tests of the registered crypto algorithms. Signed-off-by: Tudor Ambarus Reviewed-by: Claudiu Beznea Acked-by: Nicolas Ferre --- v4: use the generic "crypto" node name for all the crypto nodes, as recommended by the DT specification. Add Claudiu's R-b tag. v3: remove explicit status = "okay", as it's already the default case when not specified at all. v2: - add label to the tdes node - update commit description and specify testing method - put clocks and clock-names properties before dmas and dma-names because the clocks are mandatory, while DMA is optional for TDES and SHA arch/arm/boot/dts/sama7g5.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi index 7972cb8c2562..2453a6901313 100644 --- a/arch/arm/boot/dts/sama7g5.dtsi +++ b/arch/arm/boot/dts/sama7g5.dtsi @@ -393,6 +393,27 @@ pit64b1: timer@e1804000 { clock-names = "pclk", "gclk"; }; + aes: crypto@e1810000 { + compatible = "atmel,at91sam9g46-aes"; + reg = <0xe1810000 0x100>; + interrupts = ; + clocks = <&pmc PMC_TYPE_PERIPHERAL 27>; + clock-names = "aes_clk"; + dmas = <&dma0 AT91_XDMAC_DT_PERID(1)>, + <&dma0 AT91_XDMAC_DT_PERID(2)>; + dma-names = "tx", "rx"; + }; + + sha: crypto@e1814000 { + compatible = "atmel,at91sam9g46-sha"; + reg = <0xe1814000 0x100>; + interrupts = ; + clocks = <&pmc PMC_TYPE_PERIPHERAL 83>; + clock-names = "sha_clk"; + dmas = <&dma0 AT91_XDMAC_DT_PERID(48)>; + dma-names = "tx"; + }; + flx0: flexcom@e1818000 { compatible = "atmel,sama5d2-flexcom"; reg = <0xe1818000 0x200>; @@ -475,6 +496,17 @@ trng: rng@e2010000 { status = "disabled"; }; + tdes: crypto@e2014000 { + compatible = "atmel,at91sam9g46-tdes"; + reg = <0xe2014000 0x100>; + interrupts = ; + clocks = <&pmc PMC_TYPE_PERIPHERAL 96>; + clock-names = "tdes_clk"; + dmas = <&dma0 AT91_XDMAC_DT_PERID(54)>, + <&dma0 AT91_XDMAC_DT_PERID(53)>; + dma-names = "tx", "rx"; + }; + flx4: flexcom@e2018000 { compatible = "atmel,sama5d2-flexcom"; reg = <0xe2018000 0x200>;