| Message ID | 20220211103306.15271-1-zajec5@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: broadcom: bcm4908: add I2C block | expand |
+Kamal, On 2/11/22 2:33 AM, Rafał Miłecki wrote: > From: Rafał Miłecki <rafal@milecki.pl> > > BCM4908 uses the same I2C hw as BCM63xx / BCM67xx / BCM68xx SoCs. > > Signed-off-by: Rafał Miłecki <rafal@milecki.pl> > --- > arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi > index b0bc5262beca..9ae298e7d6cf 100644 > --- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi > +++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi > @@ -464,6 +464,15 @@ nandcs: nand@0 { > }; > }; > > + i2c@2100 { > + compatible = "brcm,brcmstb-i2c"; We should be making it clearer in the DT binding, but this should be brcm,brcmper-i2c since that was the compatible string added for the DSL class of chips, I forgot whether Kamal had to key off that compatible or not, it does not look it.
diff --git a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi index b0bc5262beca..9ae298e7d6cf 100644 --- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi @@ -464,6 +464,15 @@ nandcs: nand@0 { }; }; + i2c@2100 { + compatible = "brcm,brcmstb-i2c"; + reg = <0x2100 0x58>; + clock-frequency = <97500>; + pinctrl-names = "default"; + pinctrl-0 = <&pins_i2c_a>; + status = "disabled"; + }; + misc@2600 { compatible = "brcm,misc", "simple-mfd"; reg = <0x2600 0xe4>;