From patchwork Wed Feb 16 01:40:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Lin X-Patchwork-Id: 12747812 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CDC58C433EF for ; Wed, 16 Feb 2022 01:43:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=7rO1ttaYoIXjuA9kaifQBLHuIhpRhsczq2UZJ3TkgZw=; b=B+sz0m2lmLxf28 LnONqd2WcuUB76O7t96y5RRcBc2qP6QR0MeyI3fq+gUtDH7oJ69OPz2kkCuudtqruCJTBUytfgQzb +588ymzEyPGcBBcjAo4FpB0z5Lh7d7SmFrinQwJSxJwp67e+3PCrrkiQDsKP5lh6lYj2mZLN/WM2L If9TkceqHUuc8G3C0MM0q8hWyCzawsUTuOn3/dStDJjMKwazDTkHRL8z+nkEAw0U3U0GZNdCWaL/a SZokADBGyGBnjOoV06q9FuqyZNJl0hBK/yclRNPwqVVAVEnnz2U515f9DnDIPSm78CMyGUxebLn+y w3aQQiB0ohDF0gDiFOQg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nK9Kn-005C7G-3i; Wed, 16 Feb 2022 01:42:21 +0000 Received: from mail-m17640.qiye.163.com ([59.111.176.40]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nK9J8-005B1O-AD; Wed, 16 Feb 2022 01:40:40 +0000 Received: from localhost.localdomain (unknown [58.22.7.114]) by mail-m17640.qiye.163.com (Hmail) with ESMTPA id 50A6454032D; Wed, 16 Feb 2022 09:40:36 +0800 (CST) From: Jon Lin To: broonie@kernel.org Cc: heiko@sntech.de, linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Jon Lin Subject: [PATCH v3 6/6] spi: rockchip: clear interrupt status in error handler Date: Wed, 16 Feb 2022 09:40:28 +0800 Message-Id: <20220216014028.8123-7-jon.lin@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220216014028.8123-1-jon.lin@rock-chips.com> References: <20220216014028.8123-1-jon.lin@rock-chips.com> X-HM-Spam-Status: e1kfGhgUHx5ZQUtXWQgPGg8OCBgUHx5ZQUlOS1dZCBgUCR5ZQVlLVUtZV1 kWDxoPAgseWUFZKDYvK1lXWShZQUhPN1dZLVlBSVdZDwkaFQgSH1lBWRpMSx5WS0wfQ0NDGEpMTB keVRMBExYaEhckFA4PWVdZFhoPEhUdFFlBWVVLWQY+ X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6Ohw6OSo5Fz5IEhYMPg0zGRcz IRgaCihVSlVKTU9PQkxOTUhNTENJVTMWGhIXVREUFVUXEhU7CRQYEFYYExILCFUYFBZFWVdZEgtZ QVlOQ1VJSVVMVUpKT1lXWQgBWUFJS01DNwY+ X-HM-Tid: 0a7f0030400ad995kuws50a6454032d X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220215_174038_610515_19D1A15C X-CRM114-Status: UNSURE ( 9.58 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The interrupt status bit of the previous error data transmition will affect the next operation and cause continuous SPI transmission failure. Signed-off-by: Jon Lin --- Changes in v3: None Changes in v2: None Changes in v1: None drivers/spi/spi-rockchip.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index 8b4d56ee2193..cdc16eecaf6b 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -278,8 +278,9 @@ static void rockchip_spi_handle_err(struct spi_controller *ctlr, */ spi_enable_chip(rs, false); - /* make sure all interrupts are masked */ + /* make sure all interrupts are masked and status cleared */ writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR); + writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR); if (atomic_read(&rs->state) & TXDMA) dmaengine_terminate_async(ctlr->dma_tx);