| Message ID | 20220218212526.16021-1-pali@kernel.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: marvell: armada-37xx: Remap IO space to bus address 0x0 | expand |
On Fri, 18 Feb 2022 22:25:26 +0100 Pali Rohár <pali@kernel.org> wrote: > Remap PCI I/O space to the bus address 0x0 in the Armada 37xx > device-tree in order to support legacy I/O port based cards which have > hardcoded I/O ports in low address space. > > Some legacy PCI I/O based cards do not support 32-bit I/O addressing. > > Since commit 64f160e19e92 ("PCI: aardvark: Configure PCIe resources from > 'ranges' DT property") this driver can work with I/O windows which have > a different address for CPU than for PCI bus (unless there is some > conflict with other A37xx mapping), without needing additional support > for this in the firmware. > > Note that DDR on A37xx is mapped to bus address 0x0 and that mapping of > I/O space can be set to address 0x0 too because MEM space and I/O space > are separate and so they do not conflict. > > Signed-off-by: Pali Rohár <pali@kernel.org> > Reported-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Marek Behún <kabel@kernel.org>
On Sat, Feb 19, 2022 at 12:34 PM Marek Behún <kabel@kernel.org> wrote: > > On Fri, 18 Feb 2022 22:25:26 +0100 > Pali Rohár <pali@kernel.org> wrote: > > > Remap PCI I/O space to the bus address 0x0 in the Armada 37xx > > device-tree in order to support legacy I/O port based cards which have > > hardcoded I/O ports in low address space. > > > > Some legacy PCI I/O based cards do not support 32-bit I/O addressing. > > > > Since commit 64f160e19e92 ("PCI: aardvark: Configure PCIe resources from > > 'ranges' DT property") this driver can work with I/O windows which have > > a different address for CPU than for PCI bus (unless there is some > > conflict with other A37xx mapping), without needing additional support > > for this in the firmware. > > > > Note that DDR on A37xx is mapped to bus address 0x0 and that mapping of > > I/O space can be set to address 0x0 too because MEM space and I/O space > > are separate and so they do not conflict. > > > > Signed-off-by: Pali Rohár <pali@kernel.org> > > Reported-by: Arnd Bergmann <arnd@arndb.de> > > Reviewed-by: Marek Behún <kabel@kernel.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Hello Pali, > Remap PCI I/O space to the bus address 0x0 in the Armada 37xx > device-tree in order to support legacy I/O port based cards which have > hardcoded I/O ports in low address space. > > Some legacy PCI I/O based cards do not support 32-bit I/O addressing. > > Since commit 64f160e19e92 ("PCI: aardvark: Configure PCIe resources from > 'ranges' DT property") this driver can work with I/O windows which > have Should we add a "Fixes: 64f160e19e92 ("PCI: aardvark: Configure PCIe resources from 'ranges' DT property")" tag ? Gregory > a different address for CPU than for PCI bus (unless there is some > conflict with other A37xx mapping), without needing additional support > for this in the firmware. > > Note that DDR on A37xx is mapped to bus address 0x0 and that mapping of > I/O space can be set to address 0x0 too because MEM space and I/O space > are separate and so they do not conflict. > > Signed-off-by: Pali Rohár <pali@kernel.org> > Reported-by: Arnd Bergmann <arnd@arndb.de> > --- > arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts | 2 +- > arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts > index 6581092c2c90..7d1b9153a901 100644 > --- a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts > +++ b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts > @@ -163,7 +163,7 @@ > */ > #address-cells = <3>; > #size-cells = <2>; > - ranges = <0x81000000 0 0xe8000000 0 0xe8000000 0 0x01000000 /* Port 0 IO */ > + ranges = <0x81000000 0 0x00000000 0 0xe8000000 0 0x01000000 /* Port 0 IO */ > 0x82000000 0 0xe9000000 0 0xe9000000 0 0x07000000>; /* Port 0 MEM */ > > /* enabled by U-Boot if PCIe module is present */ > diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi > index 549c3f7c5b27..a099b7787429 100644 > --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi > +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi > @@ -515,7 +515,7 @@ > * (totaling 127 MiB) for MEM. > */ > ranges = <0x82000000 0 0xe8000000 0 0xe8000000 0 0x07f00000 /* Port 0 MEM */ > - 0x81000000 0 0xeff00000 0 0xeff00000 0 0x00100000>; /* Port 0 IO*/ > + 0x81000000 0 0x00000000 0 0xeff00000 0 0x00100000>; /* Port 0 IO */ > interrupt-map-mask = <0 0 0 7>; > interrupt-map = <0 0 0 1 &pcie_intc 0>, > <0 0 0 2 &pcie_intc 1>, > -- > 2.20.1 >
> Hello Pali, > >> Remap PCI I/O space to the bus address 0x0 in the Armada 37xx >> device-tree in order to support legacy I/O port based cards which have >> hardcoded I/O ports in low address space. >> >> Some legacy PCI I/O based cards do not support 32-bit I/O addressing. >> >> Since commit 64f160e19e92 ("PCI: aardvark: Configure PCIe resources from >> 'ranges' DT property") this driver can work with I/O windows which >> have > > Should we add a "Fixes: 64f160e19e92 ("PCI: aardvark: Configure PCIe > resources from 'ranges' DT property")" tag ? Waiting for your confirmation I tried to applied it but it failed. Did you base this patch on v5.17-rc1 ? Gregory > > Gregory > >> a different address for CPU than for PCI bus (unless there is some >> conflict with other A37xx mapping), without needing additional support >> for this in the firmware. >> >> Note that DDR on A37xx is mapped to bus address 0x0 and that mapping of >> I/O space can be set to address 0x0 too because MEM space and I/O space >> are separate and so they do not conflict. >> >> Signed-off-by: Pali Rohár <pali@kernel.org> >> Reported-by: Arnd Bergmann <arnd@arndb.de> >> --- >> arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts | 2 +- >> arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 2 +- >> 2 files changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts >> index 6581092c2c90..7d1b9153a901 100644 >> --- a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts >> +++ b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts >> @@ -163,7 +163,7 @@ >> */ >> #address-cells = <3>; >> #size-cells = <2>; >> - ranges = <0x81000000 0 0xe8000000 0 0xe8000000 0 0x01000000 /* Port 0 IO */ >> + ranges = <0x81000000 0 0x00000000 0 0xe8000000 0 0x01000000 /* Port 0 IO */ >> 0x82000000 0 0xe9000000 0 0xe9000000 0 0x07000000>; /* Port 0 MEM */ >> >> /* enabled by U-Boot if PCIe module is present */ >> diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi >> index 549c3f7c5b27..a099b7787429 100644 >> --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi >> +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi >> @@ -515,7 +515,7 @@ >> * (totaling 127 MiB) for MEM. >> */ >> ranges = <0x82000000 0 0xe8000000 0 0xe8000000 0 0x07f00000 /* Port 0 MEM */ >> - 0x81000000 0 0xeff00000 0 0xeff00000 0 0x00100000>; /* Port 0 IO*/ >> + 0x81000000 0 0x00000000 0 0xeff00000 0 0x00100000>; /* Port 0 IO */ >> interrupt-map-mask = <0 0 0 7>; >> interrupt-map = <0 0 0 1 &pcie_intc 0>, >> <0 0 0 2 &pcie_intc 1>, >> -- >> 2.20.1 >> > > -- > Gregory Clement, Bootlin > Embedded Linux and Kernel engineering > http://bootlin.com > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
On Monday 28 February 2022 17:42:03 Gregory CLEMENT wrote: > > Hello Pali, > > > >> Remap PCI I/O space to the bus address 0x0 in the Armada 37xx > >> device-tree in order to support legacy I/O port based cards which have > >> hardcoded I/O ports in low address space. > >> > >> Some legacy PCI I/O based cards do not support 32-bit I/O addressing. > >> > >> Since commit 64f160e19e92 ("PCI: aardvark: Configure PCIe resources from > >> 'ranges' DT property") this driver can work with I/O windows which > >> have > > > > Should we add a "Fixes: 64f160e19e92 ("PCI: aardvark: Configure PCIe > > resources from 'ranges' DT property")" tag ? > > Waiting for your confirmation I tried to applied it but it failed. > > Did you base this patch on v5.17-rc1 ? > > Gregory Hello! This change is breaking booting of Turris Mox kernel with older bootloader due to bugs in bootloader. So it is not possible to remap PCI I/O space for turris-mox.dts file. I will send a new version of this patch just for 37xx.dtsi file and add a comment into turris-mox.dts file it is not possible here. > > > > Gregory > > > >> a different address for CPU than for PCI bus (unless there is some > >> conflict with other A37xx mapping), without needing additional support > >> for this in the firmware. > >> > >> Note that DDR on A37xx is mapped to bus address 0x0 and that mapping of > >> I/O space can be set to address 0x0 too because MEM space and I/O space > >> are separate and so they do not conflict. > >> > >> Signed-off-by: Pali Rohár <pali@kernel.org> > >> Reported-by: Arnd Bergmann <arnd@arndb.de> > >> --- > >> arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts | 2 +- > >> arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 2 +- > >> 2 files changed, 2 insertions(+), 2 deletions(-) > >> > >> diff --git a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts > >> index 6581092c2c90..7d1b9153a901 100644 > >> --- a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts > >> +++ b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts > >> @@ -163,7 +163,7 @@ > >> */ > >> #address-cells = <3>; > >> #size-cells = <2>; > >> - ranges = <0x81000000 0 0xe8000000 0 0xe8000000 0 0x01000000 /* Port 0 IO */ > >> + ranges = <0x81000000 0 0x00000000 0 0xe8000000 0 0x01000000 /* Port 0 IO */ > >> 0x82000000 0 0xe9000000 0 0xe9000000 0 0x07000000>; /* Port 0 MEM */ > >> > >> /* enabled by U-Boot if PCIe module is present */ > >> diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi > >> index 549c3f7c5b27..a099b7787429 100644 > >> --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi > >> +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi > >> @@ -515,7 +515,7 @@ > >> * (totaling 127 MiB) for MEM. > >> */ > >> ranges = <0x82000000 0 0xe8000000 0 0xe8000000 0 0x07f00000 /* Port 0 MEM */ > >> - 0x81000000 0 0xeff00000 0 0xeff00000 0 0x00100000>; /* Port 0 IO*/ > >> + 0x81000000 0 0x00000000 0 0xeff00000 0 0x00100000>; /* Port 0 IO */ > >> interrupt-map-mask = <0 0 0 7>; > >> interrupt-map = <0 0 0 1 &pcie_intc 0>, > >> <0 0 0 2 &pcie_intc 1>, > >> -- > >> 2.20.1 > >> > > > > -- > > Gregory Clement, Bootlin > > Embedded Linux and Kernel engineering > > http://bootlin.com > > > > _______________________________________________ > > linux-arm-kernel mailing list > > linux-arm-kernel@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel > > -- > Gregory Clement, Bootlin > Embedded Linux and Kernel engineering > http://bootlin.com
On Tue, Mar 01, 2022 at 10:25:39AM +0100, Pali Rohár wrote: > On Monday 28 February 2022 17:42:03 Gregory CLEMENT wrote: > > > Hello Pali, > > > > > >> Remap PCI I/O space to the bus address 0x0 in the Armada 37xx > > >> device-tree in order to support legacy I/O port based cards which have > > >> hardcoded I/O ports in low address space. > > >> > > >> Some legacy PCI I/O based cards do not support 32-bit I/O addressing. > > >> > > >> Since commit 64f160e19e92 ("PCI: aardvark: Configure PCIe resources from > > >> 'ranges' DT property") this driver can work with I/O windows which > > >> have > > > > > > Should we add a "Fixes: 64f160e19e92 ("PCI: aardvark: Configure PCIe > > > resources from 'ranges' DT property")" tag ? > > > > Waiting for your confirmation I tried to applied it but it failed. > > > > Did you base this patch on v5.17-rc1 ? > > > > Gregory > > Hello! This change is breaking booting of Turris Mox kernel with older > bootloader due to bugs in bootloader. Do you know what actually goes wrong? I've not been involved in the discussion, but looking at the comments above, not changing the space can result in non-working cards. So it does sound like something which in general we want to do. Does the current code assume the bootloader has initialized some registers with specific values? Can that be moved into the driver so it also works with older bootloaders? Andrew
On Wed, 2 Mar 2022 14:06:01 +0100 Andrew Lunn <andrew@lunn.ch> wrote: > On Tue, Mar 01, 2022 at 10:25:39AM +0100, Pali Rohár wrote: > > On Monday 28 February 2022 17:42:03 Gregory CLEMENT wrote: > > > > Hello Pali, > > > > > > > >> Remap PCI I/O space to the bus address 0x0 in the Armada 37xx > > > >> device-tree in order to support legacy I/O port based cards which have > > > >> hardcoded I/O ports in low address space. > > > >> > > > >> Some legacy PCI I/O based cards do not support 32-bit I/O addressing. > > > >> > > > >> Since commit 64f160e19e92 ("PCI: aardvark: Configure PCIe resources from > > > >> 'ranges' DT property") this driver can work with I/O windows which > > > >> have > > > > > > > > Should we add a "Fixes: 64f160e19e92 ("PCI: aardvark: Configure PCIe > > > > resources from 'ranges' DT property")" tag ? > > > > > > Waiting for your confirmation I tried to applied it but it failed. > > > > > > Did you base this patch on v5.17-rc1 ? > > > > > > Gregory > > > > Hello! This change is breaking booting of Turris Mox kernel with older > > bootloader due to bugs in bootloader. > > Do you know what actually goes wrong? > > I've not been involved in the discussion, but looking at the comments > above, not changing the space can result in non-working cards. So it > does sound like something which in general we want to do. Does the > current code assume the bootloader has initialized some registers with > specific values? Can that be moved into the driver so it also works > with older bootloaders? No. TF-A may remap CPU PCIe window, and so U-Boot fixes these addresses in device-tree. But the fixup function was at first written in such a way that it assumes that the ranges propreties contains specific values. The proposed DT change, together with the fixup function in older U-Boot, will break ranges property to non-functional state. See corresponding U-Boot patches https://patchwork.ozlabs.org/project/uboot/patch/20200408172522.18941-5-marek.behun@nic.cz/ https://patchwork.ozlabs.org/project/uboot/patch/20210526155940.26141-5-pali@kernel.org/ https://patchwork.ozlabs.org/project/uboot/patch/20220223125232.7974-1-kabel@kernel.org/ The last patch is not merged yet. Marek
On Wed, 2 Mar 2022 14:15:15 +0100 Marek Behún <kabel@kernel.org> wrote: > On Wed, 2 Mar 2022 14:06:01 +0100 > Andrew Lunn <andrew@lunn.ch> wrote: > > > On Tue, Mar 01, 2022 at 10:25:39AM +0100, Pali Rohár wrote: > > > On Monday 28 February 2022 17:42:03 Gregory CLEMENT wrote: > > > > > Hello Pali, > > > > > > > > > >> Remap PCI I/O space to the bus address 0x0 in the Armada 37xx > > > > >> device-tree in order to support legacy I/O port based cards which have > > > > >> hardcoded I/O ports in low address space. > > > > >> > > > > >> Some legacy PCI I/O based cards do not support 32-bit I/O addressing. > > > > >> > > > > >> Since commit 64f160e19e92 ("PCI: aardvark: Configure PCIe resources from > > > > >> 'ranges' DT property") this driver can work with I/O windows which > > > > >> have > > > > > > > > > > Should we add a "Fixes: 64f160e19e92 ("PCI: aardvark: Configure PCIe > > > > > resources from 'ranges' DT property")" tag ? > > > > > > > > Waiting for your confirmation I tried to applied it but it failed. > > > > > > > > Did you base this patch on v5.17-rc1 ? > > > > > > > > Gregory > > > > > > Hello! This change is breaking booting of Turris Mox kernel with older > > > bootloader due to bugs in bootloader. > > > > Do you know what actually goes wrong? > > > > I've not been involved in the discussion, but looking at the comments > > above, not changing the space can result in non-working cards. So it > > does sound like something which in general we want to do. Does the > > current code assume the bootloader has initialized some registers with > > specific values? Can that be moved into the driver so it also works > > with older bootloaders? > > No. TF-A may remap CPU PCIe window, and so U-Boot fixes these addresses > in device-tree. But the fixup function was at first written in such a > way that it assumes that the ranges propreties contains specific > values. The proposed DT change, together with the fixup function in > older U-Boot, will break ranges property to non-functional state. > > See corresponding U-Boot patches > > https://patchwork.ozlabs.org/project/uboot/patch/20200408172522.18941-5-marek.behun@nic.cz/ > https://patchwork.ozlabs.org/project/uboot/patch/20210526155940.26141-5-pali@kernel.org/ > https://patchwork.ozlabs.org/project/uboot/patch/20220223125232.7974-1-kabel@kernel.org/ > > The last patch is not merged yet. To explain more: - the first patch added the ranges property fixup. After that patch (which was applied sometime not long after 8th April 2020) U-Boot fixes the ranges property in a way that does not work with the proposed DT change. - the second patch extended the fixup, but it still won't work correctly with the proposed DT change - the third U-Boot patch will fix this issue, afterwards the DT change won't break PCIe. This patch is not yet merged in U-Boot It is questionable how many users have updated U-Boot to the version with first fixup. AFAIK we at Turris did not make an automatic update for U-Boot yet for Turris MOX, it was done manually only for some boards that had some problems or users wanted certain features. But we can't change the device-tree because it will break the functinality for some users. What we could do is add another patch to U-Boot that would change IO window address if certain conditions are met (for example if the ranges proprety was not changed by the user and thus contains a specific value that can be checked for). Marek
On Wednesday 02 March 2022 14:06:01 Andrew Lunn wrote: > On Tue, Mar 01, 2022 at 10:25:39AM +0100, Pali Rohár wrote: > > On Monday 28 February 2022 17:42:03 Gregory CLEMENT wrote: > > > > Hello Pali, > > > > > > > >> Remap PCI I/O space to the bus address 0x0 in the Armada 37xx > > > >> device-tree in order to support legacy I/O port based cards which have > > > >> hardcoded I/O ports in low address space. > > > >> > > > >> Some legacy PCI I/O based cards do not support 32-bit I/O addressing. > > > >> > > > >> Since commit 64f160e19e92 ("PCI: aardvark: Configure PCIe resources from > > > >> 'ranges' DT property") this driver can work with I/O windows which > > > >> have > > > > > > > > Should we add a "Fixes: 64f160e19e92 ("PCI: aardvark: Configure PCIe > > > > resources from 'ranges' DT property")" tag ? > > > > > > Waiting for your confirmation I tried to applied it but it failed. > > > > > > Did you base this patch on v5.17-rc1 ? > > > > > > Gregory > > > > Hello! This change is breaking booting of Turris Mox kernel with older > > bootloader due to bugs in bootloader. > > Do you know what actually goes wrong? Yes! There is already pending fix for U-Boot which will fix this bug: https://patchwork.ozlabs.org/project/uboot/patch/20220223125232.7974-1-kabel@kernel.org/ But because older U-Boot version is already in production we cannot change this. > I've not been involved in the discussion, but looking at the comments > above, not changing the space can result in non-working cards. And changing it would result in non-bootable kernels or crashing kernels... So possible non-working card is better choice. Note that non-working cards are only those which do not support 32-bit I/O ports, which is probably only some ancient PCI or ISA cards. I have checked 3 random mPCIe SATA controllers which use I/O ports and they support 32-bit I/O addressing, so I guess these cards should not be affected at all. > So it > does sound like something which in general we want to do. Does the > current code assume the bootloader has initialized some registers with > specific values? Can that be moved into the driver so it also works > with older bootloaders? > > Andrew Yes, by converting DTS to board platform data, stop using DTS and dynamically fill board platform data by kernel code... hehe :D nothing which we want. Probably it could be possible to write drivers which would ignore address resources in DTS and fill kernel structured dynamically from HW registers, in similar way how old platform data on arm32 worked in the past. But this is too much work for which I do not see real usage. I'm really not going to use ISA card connected to PCI-to-ISA bridge connected itself to PCIe-to-PCI bridge and this connected to A3720 SoC. If somebody is really want to use this setup, then it is easier to upgrade bootloader (patch is already pending) and manually edit DTS file to remap I/O space to bus address 0x0. This edit can be automated by U-Boot script (or U-Boot driver). It is really easier to do upgrade+fix bootloader and modify DTB on the fly than hacking kernel to support older bootloaders which are already in use.
On Monday 28 February 2022 17:42:03 Gregory CLEMENT wrote: > Waiting for your confirmation I tried to applied it but it failed. > > Did you base this patch on v5.17-rc1 ? This patch is based on top of the patch which increase size of IO space from 64 kB to 1 MB: https://lore.kernel.org/linux-arm-kernel/878rv95umu.fsf@BL-laptop/ You have wrote that this patch was applied to mvebu/fixes but I do not see it applied in that branch. So I this is the reason why applying failed.
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts index 6581092c2c90..7d1b9153a901 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts @@ -163,7 +163,7 @@ */ #address-cells = <3>; #size-cells = <2>; - ranges = <0x81000000 0 0xe8000000 0 0xe8000000 0 0x01000000 /* Port 0 IO */ + ranges = <0x81000000 0 0x00000000 0 0xe8000000 0 0x01000000 /* Port 0 IO */ 0x82000000 0 0xe9000000 0 0xe9000000 0 0x07000000>; /* Port 0 MEM */ /* enabled by U-Boot if PCIe module is present */ diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi index 549c3f7c5b27..a099b7787429 100644 --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi @@ -515,7 +515,7 @@ * (totaling 127 MiB) for MEM. */ ranges = <0x82000000 0 0xe8000000 0 0xe8000000 0 0x07f00000 /* Port 0 MEM */ - 0x81000000 0 0xeff00000 0 0xeff00000 0 0x00100000>; /* Port 0 IO*/ + 0x81000000 0 0x00000000 0 0xeff00000 0 0x00100000>; /* Port 0 IO */ interrupt-map-mask = <0 0 0 7>; interrupt-map = <0 0 0 1 &pcie_intc 0>, <0 0 0 2 &pcie_intc 1>,
Remap PCI I/O space to the bus address 0x0 in the Armada 37xx device-tree in order to support legacy I/O port based cards which have hardcoded I/O ports in low address space. Some legacy PCI I/O based cards do not support 32-bit I/O addressing. Since commit 64f160e19e92 ("PCI: aardvark: Configure PCIe resources from 'ranges' DT property") this driver can work with I/O windows which have a different address for CPU than for PCI bus (unless there is some conflict with other A37xx mapping), without needing additional support for this in the firmware. Note that DDR on A37xx is mapped to bus address 0x0 and that mapping of I/O space can be set to address 0x0 too because MEM space and I/O space are separate and so they do not conflict. Signed-off-by: Pali Rohár <pali@kernel.org> Reported-by: Arnd Bergmann <arnd@arndb.de> --- arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts | 2 +- arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)