From patchwork Fri Feb 25 12:02:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vignesh Raghavendra X-Patchwork-Id: 12760178 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 94FE2C433F5 for ; Fri, 25 Feb 2022 12:05:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=7igTVVR00Q2WqOnmBQkv/lleAjsO3F6au5Yr6qchPTE=; b=wAugSXBuut7hXD ngWR9XlIZVc3xt9psZTOmnxQvrklniKtZCGN8Z+sCtKD59rBDUqEKTxpciw7j5MWJtvjHthJk7+X2 kGU5KDdzs0L9N/YAbjBgS9aiFOaCKGIbX+F18E8owq/kEmLFcB+8VwMSYBfoDkCP2ldgGl1cBb41X rN5uYXGs0uiQavSLk3dwHrN9KCN2nTxkab58j/6O4dkWQd5QtwqOhrIkwQ7HQQgeA/ovBktTuKd9I o6N9Ra6du4edAxp0RuN9FYE4891qEZSSzOwBbOdSn/N/X13XdF1gL3/pRLhy6TSDjL+jcY/9fiHVD ACp78Jaq1Yzfo+7HwzFA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nNZKI-004lNT-6I; Fri, 25 Feb 2022 12:03:58 +0000 Received: from lelv0143.ext.ti.com ([198.47.23.248]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nNZJk-004lCW-FW for linux-arm-kernel@lists.infradead.org; Fri, 25 Feb 2022 12:03:27 +0000 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 21PC3Lsj025067; Fri, 25 Feb 2022 06:03:21 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1645790601; bh=Yy4jGpPS3fEMb8Kl9RYaMpOjJs6HLhtsyLS//EUljlg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=O16l6+oLUIVXUcWp6DG6tB+pZl8GEYRcYAxAOV5rWa0ksQmO424HuugBBWffwmvm4 X+UqNnfQ+UPV3pAozGREBli704b41Y2+yKKjNyAjFZYa19N2lR5TLb0F8PoPQA5wIL 618Mejwo7TfiJL0NFe6vkzlDtmg8P97tkhsWViUw= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 21PC3Lsc045569 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 25 Feb 2022 06:03:21 -0600 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14; Fri, 25 Feb 2022 06:03:20 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Fri, 25 Feb 2022 06:03:20 -0600 Received: from ula0132425.ent.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 21PC36md046680; Fri, 25 Feb 2022 06:03:17 -0600 From: Vignesh Raghavendra To: Nishanth Menon , Vignesh Raghavendra CC: Tero Kristo , Rob Herring , Krzysztof Kozlowski , Santosh Shilimkar , Marc Zyngier , , , Subject: [PATCH v3 3/5] dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM62 Date: Fri, 25 Feb 2022 17:32:37 +0530 Message-ID: <20220225120239.1303821-4-vigneshr@ti.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220225120239.1303821-1-vigneshr@ti.com> References: <20220225120239.1303821-1-vigneshr@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220225_040324_625364_070342B9 X-CRM114-Status: GOOD ( 11.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Suman Anna Add pinctrl macros for AM62x SoCs. These macro definitions are similar to that of previous platforms, but adding new definitions to avoid any naming confusions in the SoC dts files. checkpatch insists the following error exists: ERROR: Macros with complex values should be enclosed in parentheses However, we do not need parentheses enclosing the values for this macro as we do intend it to generate two separate values as has been done for other similar platforms. Signed-off-by: Suman Anna Signed-off-by: Vignesh Raghavendra Acked-by: Rob Herring --- include/dt-bindings/pinctrl/k3.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/dt-bindings/pinctrl/k3.h b/include/dt-bindings/pinctrl/k3.h index 63e038e36ca3c..a5204ab91d3ec 100644 --- a/include/dt-bindings/pinctrl/k3.h +++ b/include/dt-bindings/pinctrl/k3.h @@ -41,4 +41,7 @@ #define J721S2_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) #define J721S2_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define AM62X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define AM62X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) + #endif