diff mbox series

[1/2] clk: imx: add mcore_booted boot paratemter

Message ID 20220228061150.3006113-1-peng.fan@oss.nxp.com (mailing list archive)
State New, archived
Headers show
Series [1/2] clk: imx: add mcore_booted boot paratemter | expand

Commit Message

Peng Fan (OSS) Feb. 28, 2022, 6:11 a.m. UTC
From: Peng Fan <peng.fan@nxp.com>

Add mcore_booted boot parameter which could simplify AMP clock
management. To i.MX8M, there is CCM(clock control Module) to generate
clock root clock, anatop(analog PLL module) to generate PLL, and CCGR
(clock gating) to gate clocks to peripherals. As below:
  anatop->ccm->ccgr->peripheral

Linux handles the clock management and the auxiliary core is under
control of Linux. Although there is per hardware domain control for CCGR
and CCM, auxiliary core normally only use CCGR hardware domain control
to avoid linux gate off the clk to peripherals and leave CCM ana anatop
to Linux.

Per NXP hardware design, because CCGR already support gate to
peripherals, and clk root gate power leakage is negligible. So
when in AMP case, we could not register the clk root gate.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/clk/imx/clk.c | 9 +++++++++
 drivers/clk/imx/clk.h | 1 +
 2 files changed, 10 insertions(+)

Comments

Abel Vesa Feb. 28, 2022, 9:49 a.m. UTC | #1
On 22-02-28 14:11:49, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> Add mcore_booted boot parameter which could simplify AMP clock
> management. To i.MX8M, there is CCM(clock control Module) to generate
> clock root clock, anatop(analog PLL module) to generate PLL, and CCGR
> (clock gating) to gate clocks to peripherals. As below:
>   anatop->ccm->ccgr->peripheral
> 
> Linux handles the clock management and the auxiliary core is under
> control of Linux. Although there is per hardware domain control for CCGR
> and CCM, auxiliary core normally only use CCGR hardware domain control
> to avoid linux gate off the clk to peripherals and leave CCM ana anatop
> to Linux.
> 
> Per NXP hardware design, because CCGR already support gate to
> peripherals, and clk root gate power leakage is negligible. So
> when in AMP case, we could not register the clk root gate.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  drivers/clk/imx/clk.c | 9 +++++++++
>  drivers/clk/imx/clk.h | 1 +
>  2 files changed, 10 insertions(+)
> 
> diff --git a/drivers/clk/imx/clk.c b/drivers/clk/imx/clk.c
> index 7cc669934253..5d3ac59b382b 100644
> --- a/drivers/clk/imx/clk.c
> +++ b/drivers/clk/imx/clk.c
> @@ -146,6 +146,15 @@ void imx_cscmr1_fixup(u32 *val)
>  	return;
>  }
>  
> +bool mcore_booted;
> +
> +static int __init setup_mcore_booted(char *booted)
> +{
> +	mcore_booted = true;
> +	return 1;
> +}
> +__setup("mcore_booted", setup_mcore_booted);

Lets give module_param a try first, as discussed.

Thanks.

> +
>  #ifndef MODULE
>  
>  static bool imx_keep_uart_clocks;
> diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
> index a7cbbcd1a3f4..5061a06468df 100644
> --- a/drivers/clk/imx/clk.h
> +++ b/drivers/clk/imx/clk.h
> @@ -7,6 +7,7 @@
>  #include <linux/clk-provider.h>
>  
>  extern spinlock_t imx_ccm_lock;
> +extern bool mcore_booted;
>  
>  void imx_check_clocks(struct clk *clks[], unsigned int count);
>  void imx_check_clk_hws(struct clk_hw *clks[], unsigned int count);
> -- 
> 2.25.1
>
diff mbox series

Patch

diff --git a/drivers/clk/imx/clk.c b/drivers/clk/imx/clk.c
index 7cc669934253..5d3ac59b382b 100644
--- a/drivers/clk/imx/clk.c
+++ b/drivers/clk/imx/clk.c
@@ -146,6 +146,15 @@  void imx_cscmr1_fixup(u32 *val)
 	return;
 }
 
+bool mcore_booted;
+
+static int __init setup_mcore_booted(char *booted)
+{
+	mcore_booted = true;
+	return 1;
+}
+__setup("mcore_booted", setup_mcore_booted);
+
 #ifndef MODULE
 
 static bool imx_keep_uart_clocks;
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index a7cbbcd1a3f4..5061a06468df 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -7,6 +7,7 @@ 
 #include <linux/clk-provider.h>
 
 extern spinlock_t imx_ccm_lock;
+extern bool mcore_booted;
 
 void imx_check_clocks(struct clk *clks[], unsigned int count);
 void imx_check_clk_hws(struct clk_hw *clks[], unsigned int count);