From patchwork Tue Mar 1 12:34:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 12764699 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4957FC433EF for ; Tue, 1 Mar 2022 12:36:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Nh3jjf6v+0jHtHNxZv2NuuiWPYPSvIxsEbgphIJY2sg=; b=i0pcOigw9Th1md vZ72S07cX+gefDmVERzVbSMF/53x1gyvfPJnc5gkG/p230Th17kI/0E7i4dGIsBIzxLIaF/ZfYBh8 pbqAwX4ntLCoo1NIwgqeRoQRIj8fItMscg2MqJvXP6AjyV8MlMtOAcYYXDxR7NZhPhp+sHQPxZrHM 6ea+xC7hZQR9YRH6ohYCZBYMOmW2Gk0oWsxID1h/LJCiRSZbdZRIXNkvkmwxEq18dKYXQVnk2Ai9t Vosf1gqe0Stl2z1aBA250tUIXepVKjCgiyoyuxrRd9OFLiGA2DlPisfF4PTE1NmgRbQ8ZLPjlCGhO C3P6i8OqiTAfgqIudSmQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nP1iN-00GYz5-MG; Tue, 01 Mar 2022 12:34:52 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nP1hW-00GYeo-VZ for linux-arm-kernel@lists.infradead.org; Tue, 01 Mar 2022 12:34:00 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1646138040; x=1677674040; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=43qiS6l/WyBCSmUqkK2jh3Y6sKNvcyLpeI6tzHqMrPE=; b=Il6yuQ1elDuFTze4gx8Qhb8rCShd5ZWQv6KblkEkGwrEDpV1sXWPSiAh qiiokYSlmKVAFKspA8yeEr18Iqxuk03t/JscRfW4Yffhtfr6QR95+NTEJ c+BqVKOSJee/v7ggXhSJXMae2QHGlYzzJvVnmvhgalT62zqfTjmFw6wFA peszpYVYVUFkr1kc5rDcWephHM7HMGmOl0hyQ3rB1WFPxMokXkwl6ceLz 8tt4lndBjat7sc7LEGHxkVG1JNrUJ7enb5C9e4qRY/Y5hubgJU+L93YOL woSILsw+7gaiMT1oRhdsbQoGq/IkndZbl17fEtggyudYAMsOJlnRjNHbg A==; X-IronPort-AV: E=Sophos;i="5.90,146,1643698800"; d="scan'208";a="147642347" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 01 Mar 2022 05:34:00 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Tue, 1 Mar 2022 05:33:58 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Tue, 1 Mar 2022 05:33:56 -0700 From: Claudiu Beznea To: , CC: , , Claudiu Beznea Subject: [PATCH 6/7] clocksource/drivers/timer-microchip-pit64b: use mchp_pit64b_{suspend, resume} Date: Tue, 1 Mar 2022 14:34:48 +0200 Message-ID: <20220301123449.2816625-7-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220301123449.2816625-1-claudiu.beznea@microchip.com> References: <20220301123449.2816625-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220301_043359_140621_13A5F76D X-CRM114-Status: GOOD ( 11.68 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Use mchp_pit64b_suspend() and mchp_pit64b_resume() to disable or enable timers clocks on init and remove specific clk_prepare_{disable, enable} calls. This is ok also for clockevent timer as proper clock enable, disable is done on .set_state_oneshot, .set_state_periodic, .set_state_shutdown calls. Signed-off-by: Claudiu Beznea --- drivers/clocksource/timer-microchip-pit64b.c | 24 ++++---------------- 1 file changed, 5 insertions(+), 19 deletions(-) diff --git a/drivers/clocksource/timer-microchip-pit64b.c b/drivers/clocksource/timer-microchip-pit64b.c index b51259395ac3..f50705698283 100644 --- a/drivers/clocksource/timer-microchip-pit64b.c +++ b/drivers/clocksource/timer-microchip-pit64b.c @@ -344,6 +344,7 @@ static int __init mchp_pit64b_init_clksrc(struct mchp_pit64b_timer *timer, if (!cs) return -ENOMEM; + mchp_pit64b_resume(timer); mchp_pit64b_reset(timer, ULLONG_MAX, MCHP_PIT64B_MR_CONT, 0); mchp_pit64b_cs_base = timer->base; @@ -365,8 +366,7 @@ static int __init mchp_pit64b_init_clksrc(struct mchp_pit64b_timer *timer, pr_debug("clksrc: Failed to register PIT64B clocksource!\n"); /* Stop timer. */ - writel_relaxed(MCHP_PIT64B_CR_SWRST, - timer->base + MCHP_PIT64B_CR); + mchp_pit64b_suspend(timer); kfree(cs); return ret; @@ -450,19 +450,10 @@ static int __init mchp_pit64b_dt_init_timer(struct device_node *node, if (ret) goto irq_unmap; - ret = clk_prepare_enable(timer.pclk); - if (ret) - goto irq_unmap; - - if (timer.mode & MCHP_PIT64B_MR_SGCLK) { - ret = clk_prepare_enable(timer.gclk); - if (ret) - goto pclk_unprepare; - + if (timer.mode & MCHP_PIT64B_MR_SGCLK) clk_rate = clk_get_rate(timer.gclk); - } else { + else clk_rate = clk_get_rate(timer.pclk); - } clk_rate = clk_rate / (MCHP_PIT64B_MODE_TO_PRES(timer.mode) + 1); if (clkevt) @@ -471,15 +462,10 @@ static int __init mchp_pit64b_dt_init_timer(struct device_node *node, ret = mchp_pit64b_init_clksrc(&timer, clk_rate); if (ret) - goto gclk_unprepare; + goto irq_unmap; return 0; -gclk_unprepare: - if (timer.mode & MCHP_PIT64B_MR_SGCLK) - clk_disable_unprepare(timer.gclk); -pclk_unprepare: - clk_disable_unprepare(timer.pclk); irq_unmap: irq_dispose_mapping(irq); io_unmap: