From patchwork Thu Mar 3 16:03:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 12767726 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4F353C433EF for ; Thu, 3 Mar 2022 16:13:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=GtG8A5ocSTKCEY7B1mKKFoKs9HVeGbBR0XyZrR236/U=; b=GiTxLwuTw/kVat m92w7EZAQ3LcZwgV2fE9EooYrJbwG+7wBHdG4MYTxh0IN0UcX9fn0P+/2/8hIYc4Udr0RISj8gyN5 +TxNJXDutjWhfD2I4gCSDbZSHhth8mK9vwKC2PMRzW0HulN67wb+TS9BiqbQw/qXHlTQCzybGEpdE mVB84CGwuIeR1viMl1aXiTzbpfLWCWVXddE8YNwgULq4t9Fzs2OtJLNFIqXnfQ3oJBA+MvJGGICYZ 49b1es20iI4kvCCUvOSu08VfjPA1C6k1TRirifS/sO/p5H+m8UA+Xyj6L8yNcGFfrXadPzm8lWYAm IWJjxEkrortjemd4aTTA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nPo3P-00745n-98; Thu, 03 Mar 2022 16:11:48 +0000 Received: from ssl.serverraum.org ([2a01:4f8:151:8464::1:2]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nPnvb-0071IG-Nb for linux-arm-kernel@lists.infradead.org; Thu, 03 Mar 2022 16:03:46 +0000 Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id E47A3223F6; Thu, 3 Mar 2022 17:03:39 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1646323420; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BOHb81f6UjTpy/o++osD43lpaRTuWZcu/2E7PE6CXxA=; b=abuUEQ/zGzluu5mT0ZzbVlfNgbdmEbU1+ftwK2a2CuMvWek5MqX7RGD3gKJbhydWzHmv0S DO2cf5V1DlYHeBfBRDJCRnKYetqf2ywawas5RqHrugybdeR2N1pVRxLbCiZ2AzGZzMhvck 97FlmFBGObbciyYoaVm+FCYAxUnCgs8= From: Michael Walle To: Kavyasree Kotagiri , Nicolas Ferre Cc: Arnd Bergmann , Olof Johansson , soc@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Alexandre Belloni , Claudiu Beznea , Michael Walle Subject: [PATCH v1 5/6] ARM: dts: lan966x: add flexcom I2C nodes Date: Thu, 3 Mar 2022 17:03:22 +0100 Message-Id: <20220303160323.3316317-6-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220303160323.3316317-1-michael@walle.cc> References: <20220303160323.3316317-1-michael@walle.cc> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220303_080343_984386_34861CA1 X-CRM114-Status: GOOD ( 10.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add all I2C nodes of the flexcom IP blocks. The driver supports FIFO, DMA or both combined. But the latter isn't working correctly. Thus, skip the fifo-size property for now. DMA is doing single byte reads in this case. Keep the nodes disabled by default. Signed-off-by: Michael Walle --- arch/arm/boot/dts/lan966x.dtsi | 65 ++++++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index 0616927f1bb1..c4aab7f65790 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -120,6 +120,19 @@ spi0: spi@400 { atmel,fifo-size = <32>; status = "disabled"; }; + + i2c0: i2c@600 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "microchip,sam9x60-i2c"; + reg = <0x600 0x200>; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>, + <&dma0 AT91_XDMAC_DT_PERID(2)>; + dma-names = "tx", "rx"; + clocks = <&nic_clk>; + status = "disabled"; + }; }; flx1: flexcom@e0044000 { @@ -158,6 +171,19 @@ spi1: spi@400 { atmel,fifo-size = <32>; status = "disabled"; }; + + i2c1: i2c@600 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "microchip,sam9x60-i2c"; + reg = <0x600 0x200>; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>, + <&dma0 AT91_XDMAC_DT_PERID(4)>; + dma-names = "tx", "rx"; + clocks = <&nic_clk>; + status = "disabled"; + }; }; trng: rng@e0048000 { @@ -213,6 +239,19 @@ spi2: spi@400 { atmel,fifo-size = <32>; status = "disabled"; }; + + i2c2: i2c@600 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "microchip,sam9x60-i2c"; + reg = <0x600 0x200>; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>, + <&dma0 AT91_XDMAC_DT_PERID(6)>; + dma-names = "tx", "rx"; + clocks = <&nic_clk>; + status = "disabled"; + }; }; flx3: flexcom@e0064000 { @@ -251,6 +290,19 @@ spi3: spi@400 { atmel,fifo-size = <32>; status = "disabled"; }; + + i2c3: i2c@600 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "microchip,sam9x60-i2c"; + reg = <0x600 0x200>; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(9)>, + <&dma0 AT91_XDMAC_DT_PERID(8)>; + dma-names = "tx", "rx"; + clocks = <&nic_clk>; + status = "disabled"; + }; }; dma0: dma-controller@e0068000 { @@ -308,6 +360,19 @@ spi4: spi@400 { atmel,fifo-size = <32>; status = "disabled"; }; + + i2c4: i2c@600 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "microchip,sam9x60-i2c"; + reg = <0x600 0x200>; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>, + <&dma0 AT91_XDMAC_DT_PERID(10)>; + dma-names = "tx", "rx"; + clocks = <&nic_clk>; + status = "disabled"; + }; }; timer0: timer@e008c000 {