From patchwork Fri Mar 4 06:31:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tommy Huang X-Patchwork-Id: 12769062 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C9A15C4332F for ; Fri, 4 Mar 2022 13:11:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=3rzghpRmI/nLnUOEXE8KIQzGOFL72HsP8BkGAUnd5oI=; b=0OgwJUp92j5gB5 /YxIlnX/wPheLPZlNkWETEyMYbNkHDKYiU5MWe+VnbzyntfDpwO4uBEa1IfaxHGFDa4QdCRKaUVaE 2M3bILFbvdC/8IrmVJ9MaK5lWpvWmTYLFQoud3pGb4Hbc1IdpBV8Vi/dnxC6aod4TAkHg3HmUi4qL ja+dk9EcpCk9TUIhhqbIV8EUrU1X0dvA6vUQmOZcmiGvVNg2715JZOS5kgqjpF11xX5yU7Vvjl3iv AQD2ImNxlVti8mft0UpHjf+GZrLqPPB/SzTlylH17F2+dA7jLDEhkW3FT+PtVQFPO0tarpsjTNY1I 43+78CISr8vzXljGFsdQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nQ7hK-00A4sX-Lk; Fri, 04 Mar 2022 13:10:18 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nQ7h7-00A4mb-C4 for linux-arm-kernel@bombadil.infradead.org; Fri, 04 Mar 2022 13:10:05 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Type:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:CC:To:From:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=ZxRQQNrNxwmB1ezJkatHXC2Dtd8ty6b9CQaMVzLTcHA=; b=BRbzzE7ZNqfsLSxGJ7UTKS14K+ rqvMz4mEl5KcuHXbq6Z/JUEnjwj8KGVRzpOrmUr6R2z6MS4yEzI/B9ggzDQAou/LghYE718BEyT2H A/hh3XnKZ9IxPOmwBzsdZL1dT1zVXGsMAIOoxAlvUn65q7XT3ntB/PntVcItZLKwXuFNgnd85+Bqi rCCUzBRkwh4v25EPEF61AAwGUM/X+18yMR2NdYWpjyqeKwQYceEUgNMmbvywWtbEmpE1VvvLyNrjy +fW/90JVyKG6x/u5hM6b3WkkuaVohrBhebdATUF4daHJTxD+sDpMzFKapoXBUgFOeyAvfpYfNABXl oab1TQ9g==; Received: from twspam01.aspeedtech.com ([211.20.114.71]) by desiato.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nQ1UW-00F7IN-K9 for linux-arm-kernel@lists.infradead.org; Fri, 04 Mar 2022 06:32:43 +0000 Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 2246MIZl041905; Fri, 4 Mar 2022 14:22:18 +0800 (GMT-8) (envelope-from tommy_huang@aspeedtech.com) Received: from tommy0527-VirtualBox.aspeedtech.com (192.168.2.141) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 4 Mar 2022 14:31:44 +0800 From: Tommy Haung To: , , , , , , , , , CC: Subject: [PATCH v1 1/2] drm/aspeed: Add gfx flags and clock selection for AST2600 Date: Fri, 4 Mar 2022 14:31:36 +0800 Message-ID: <20220304063137.12970-2-tommy_huang@aspeedtech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220304063137.12970-1-tommy_huang@aspeedtech.com> References: <20220304063137.12970-1-tommy_huang@aspeedtech.com> MIME-Version: 1.0 X-Originating-IP: [192.168.2.141] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 2246MIZl041905 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220304_063241_276015_725D2CA8 X-CRM114-Status: GOOD ( 14.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add clock selection code for AST2600. At AST2600 user could select more than one dispaly timing. Add gfx flags for future usage. Signed-off-by: Tommy Haung --- drivers/gpu/drm/aspeed/aspeed_gfx.h | 11 +++++++++++ drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c | 14 ++++++++++++++ drivers/gpu/drm/aspeed/aspeed_gfx_drv.c | 4 ++++ 3 files changed, 29 insertions(+) diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx.h b/drivers/gpu/drm/aspeed/aspeed_gfx.h index 4e6a442c3886..eb4c267cde5e 100644 --- a/drivers/gpu/drm/aspeed/aspeed_gfx.h +++ b/drivers/gpu/drm/aspeed/aspeed_gfx.h @@ -16,6 +16,7 @@ struct aspeed_gfx { u32 vga_scratch_reg; u32 throd_val; u32 scan_line_max; + u32 flags; struct drm_simple_display_pipe pipe; struct drm_connector connector; @@ -106,3 +107,13 @@ int aspeed_gfx_create_output(struct drm_device *drm); /* CRT_THROD */ #define CRT_THROD_LOW(x) (x) #define CRT_THROD_HIGH(x) ((x) << 8) + +/* SCU control */ +#define SCU_G6_CLK_COURCE 0x300 + +/* GFX FLAGS */ +#define CLK_MASK BIT(0) +#define CLK_G6 BIT(0) + +#define G6_CLK_MASK (BIT(8) | BIT(9) | BIT(10)) +#define G6_USB_40_CLK BIT(9) diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c b/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c index 827e62c1daba..a24fab22eac4 100644 --- a/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c +++ b/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c @@ -77,6 +77,18 @@ static void aspeed_gfx_disable_controller(struct aspeed_gfx *priv) regmap_update_bits(priv->scu, priv->dac_reg, BIT(16), 0); } +static void aspeed_gfx_set_clk(struct aspeed_gfx *priv) +{ + switch (priv->flags & CLK_MASK) { + case CLK_G6: + regmap_update_bits(priv->scu, SCU_G6_CLK_COURCE, G6_CLK_MASK, 0x0); + regmap_update_bits(priv->scu, SCU_G6_CLK_COURCE, G6_CLK_MASK, G6_USB_40_CLK); + break; + default: + break; + } +} + static void aspeed_gfx_crtc_mode_set_nofb(struct aspeed_gfx *priv) { struct drm_display_mode *m = &priv->pipe.crtc.state->adjusted_mode; @@ -87,6 +99,8 @@ static void aspeed_gfx_crtc_mode_set_nofb(struct aspeed_gfx *priv) if (err) return; + aspeed_gfx_set_clk(priv); + #if 0 /* TODO: we have only been able to test with the 40MHz USB clock. The * clock is fixed, so we cannot adjust it here. */ diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c b/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c index d10246b1d1c2..af56ffdccc65 100644 --- a/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c +++ b/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c @@ -64,6 +64,7 @@ struct aspeed_gfx_config { u32 vga_scratch_reg; /* VGA scratch register in SCU */ u32 throd_val; /* Default Threshold Seting */ u32 scan_line_max; /* Max memory size of one scan line */ + u32 gfx_flags; /* Flags for gfx chip caps */ }; static const struct aspeed_gfx_config ast2400_config = { @@ -72,6 +73,7 @@ static const struct aspeed_gfx_config ast2400_config = { .vga_scratch_reg = 0x50, .throd_val = CRT_THROD_LOW(0x1e) | CRT_THROD_HIGH(0x12), .scan_line_max = 64, + .gfx_flags = 0, }; static const struct aspeed_gfx_config ast2500_config = { @@ -80,6 +82,7 @@ static const struct aspeed_gfx_config ast2500_config = { .vga_scratch_reg = 0x50, .throd_val = CRT_THROD_LOW(0x24) | CRT_THROD_HIGH(0x3c), .scan_line_max = 128, + .gfx_flags = 0, }; static const struct aspeed_gfx_config ast2600_config = { @@ -88,6 +91,7 @@ static const struct aspeed_gfx_config ast2600_config = { .vga_scratch_reg = 0x50, .throd_val = CRT_THROD_LOW(0x50) | CRT_THROD_HIGH(0x70), .scan_line_max = 128, + .gfx_flags = CLK_G6, }; static const struct of_device_id aspeed_gfx_match[] = {